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5P83904

更新时间: 2024-11-21 14:56:11
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
19页 562K
描述
1.8 V to 3.3 V 1:4 Crystal Input to LVCMOS Output High-Performance Clock Fanout Buffer with OE

5P83904 数据手册

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High-Performance 1.8V/2.5V/3.3V Crystal  
Input to LVCMOS Clock Fanout Buffer with OE  
5P8390x  
DATASHEET  
Description  
Features  
The 5P8390x is a high performance, 1-to-4/6/8 crystal input to  
LVCMOS fanout buffer with output enable pins. This device  
accepts a fundamental mode crystal from 10MHz to 40MHz  
and outputs LVCMOS clocks with best-in-class phase noise  
performance.  
4/6/8 copies of LVCMOS output clocks with best-in-class  
phase noise performance  
Phase Noise:  
Offset Noise Power (3.3V)  
100Hz: -131 dBc/Hz  
The 5P8390x family (5P83904, 5P83905, and 5P83908)  
features a synchronous glitch-free Output Enable function to  
eliminate any intermediate incorrect output clock cycles when  
enabling or disabling outputs. It comes in standard TSSOP  
packages or small QFN packages and can operate from 1.8V  
to 3.3V supplies.  
1KHz: -145 dBc/Hz  
10KHz: -154 dBc/Hz  
100KHz: -161 dBc/Hz  
Operating power supply modes:  
Full 3.3V, 2.5V, 1.8V  
Mixed 3.3V core/2.5V output operating supply  
Mixed 3.3V core/1.8V output operating supply  
Mixed 2.5V core/1.8V output operating supply  
Crystal Oscillator Interface  
Synchronous Output Enable  
Packaged in 16-, 20-pin TSSOP and QFN packages (Pb  
free, fully RoHS compliant)  
Extended (-40°C to +105°C) temperature range  
5P83904 Block Diagram  
CLK0  
CLK1  
CLK2  
XTAL_IN  
OSC  
XTAL_OUT  
ENABLE1  
ENABLE2  
SYNC1  
SYNC2  
CLK3  
5P8390x OCTOBER 5, 2016  

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