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5962R8775901B2A PDF预览

5962R8775901B2A

更新时间: 2024-11-27 20:16:43
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动输出元件逻辑集成电路
页数 文件大小 规格书
8页 138K
描述
IC ACT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CQCC20, CERAMIC, LCC-20, Bus Driver/Transceiver

5962R8775901B2A 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCN, LCC20,.35SQReach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.06
Is Samacsys:N控制类型:ENABLE LOW
系列:ACTJESD-30 代码:S-CQCC-N20
JESD-609代码:e0长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC20,.35SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:8.5 ns传播延迟(tpd):9.5 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:1.905 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb) - hot dipped端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED总剂量:100k Rad(Si) V
宽度:8.89 mmBase Number Matches:1

5962R8775901B2A 数据手册

 浏览型号5962R8775901B2A的Datasheet PDF文件第2页浏览型号5962R8775901B2A的Datasheet PDF文件第3页浏览型号5962R8775901B2A的Datasheet PDF文件第4页浏览型号5962R8775901B2A的Datasheet PDF文件第5页浏览型号5962R8775901B2A的Datasheet PDF文件第6页浏览型号5962R8775901B2A的Datasheet PDF文件第7页 
August 1998  
54AC240 54ACT240  
Octal Buffer/Line Driver with TRI-STATE® Outputs  
n Inverting TRI-STATE outputs drive bus lines or buffer  
memory address registers  
n Outputs source/sink 24 mA  
n ’ACT240 has TTL-compatible inputs  
n Standard Microcircuit Drawing (SMD)  
— ’AC240: 5962-87550  
General Description  
The ’AC/’ACT240 is an octal buffer and line driver designed  
to be employed as a memory address driver, clock driver and  
bus oriented transmitter or receiver which provides improved  
PC board density.  
— ’ACT240: 5962-87759  
Features  
n ICC and IOZ reduced by 50%  
Logic Symbol  
Connection Diagrams  
IEEE/IEC  
Pin Assignment  
for DIP and Flatpak  
DS100280-2  
Pin Assignment  
for LCC  
DS100280-1  
Pin Names  
OE1, OE2  
I0–I7  
Description  
TRI-STATE Output Enable Inputs  
Inputs  
O0–O7  
Outputs  
DS100280-3  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
FACT® is a registered trademark of Fairchild Semiconductor Corporation.  
© 1998 National Semiconductor Corporation  
DS100280  
www.national.com  

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