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5962-9681801Q2A PDF预览

5962-9681801Q2A

更新时间: 2024-01-12 16:20:04
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
18页 570K
描述
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

5962-9681801Q2A 技术参数

是否Rohs认证: 不符合生命周期:Active
零件包装代码:QLCC包装说明:QCCN,
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.38
系列:AHCJESD-30 代码:S-CQCC-N20
JESD-609代码:e0逻辑集成电路类型:BUS TRANSCEIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):13.5 ns
认证状态:Qualified筛选级别:MIL-PRF-38535 Class Q
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:TIN LEAD端子形式:NO LEAD
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

5962-9681801Q2A 数据手册

 浏览型号5962-9681801Q2A的Datasheet PDF文件第2页浏览型号5962-9681801Q2A的Datasheet PDF文件第3页浏览型号5962-9681801Q2A的Datasheet PDF文件第4页浏览型号5962-9681801Q2A的Datasheet PDF文件第5页浏览型号5962-9681801Q2A的Datasheet PDF文件第6页浏览型号5962-9681801Q2A的Datasheet PDF文件第7页 
SN54AHC245, SN74AHC245  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS230I – OCTOBER 1995 – REVISED JULY 2003  
SN54AHC245 . . . J OR W PACKAGE  
SN74AHC245 . . . DB, DGV, DW, N, OR PW PACKAGE  
(TOP VIEW)  
Operating Range 2-V to 5.5-V V  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
V
CC  
description/ordering information  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
A2  
The ’AHC245 octal bus transceivers are designed  
for asynchronous two-way communication  
between data buses. The control-function  
implementation minimizes external timing  
requirements.  
A3  
A4  
A5  
A6  
A7  
These devices allow data transmission from the  
A bus to the B bus or from the B bus to the A bus,  
depending on the logic level at the  
direction-control (DIR) input. The output-enable  
(OE) input can be used to disable the device so  
that the buses are effectively isolated.  
A8  
GND  
SN54AHC245 . . . FK PACKAGE  
(TOP VIEW)  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
3
2
1 20 19  
18  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
B1  
B2  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16 B3  
15  
14  
B4  
B5  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
Tube  
SN74AHC245N  
SN74AHC245N  
Tube  
SN74AHC245DW  
SN74AHC245DWR  
SN74AHC245DBR  
SN74AHC245PW  
SN74AHC245PWR  
SN74AHC245DGVR  
SNJ54AHC245J  
SOIC – DW  
SSOP – DB  
TSSOP – PW  
AHC245  
Tape and reel  
Tape and reel  
Tube  
–40°C to 85°C  
HA245  
HA245  
Tape and reel  
Tape and reel  
Tube  
TVSOP – DGV  
CDIP – J  
HA245  
SNJ54AHC245J  
SNJ54AHC245W  
SNJ54AHC245FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54AHC245W  
SNJ54AHC245FK  
LCCC – FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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