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5962-9469101Q3A PDF预览

5962-9469101Q3A

更新时间： 2024-02-23 00:56:55
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理逻辑集成电路
页数 文件大小 规格书
8页 127K
描述
10-Bit Bus Interface Flip-Flops With 3-State Outputs 28-LCCC -55 to 125

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5962-9469101Q3A 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCN, LCC28,.45SQ针数：28
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.76
系列：ABTJESD-30 代码：S-CQCC-N28
长度：11.43 mm逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：125000000 Hz最大I（ol）：0.048 A
位数：10功能数量：1
端口数量：2端子数量：28
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QCCN
封装等效代码：LCC28,.45SQ封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V传播延迟（tpd）：6.9 ns
认证状态：Not Qualified筛选级别：MIL-PRF-38535 Class Q
座面最大高度：2.03 mm子类别：Bus Driver/Transceiver
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BICMOS温度等级：MILITARY
端子形式：NO LEAD端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：11.43 mm
Base Number Matches：1

5962-9469101Q3A 数据手册

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SN54ABT821, SN74ABT821A  
10-BIT BUS-INTERFACE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCBS193E – FEBRUARY 1991 – REVISED MAY 1997  
SN54ABT821 . . . JT OR W PACKAGE  
SN74ABT821A . . . DB, DW, OR NT PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1
2
3
4
5
6
7
8
9
24  
V
CC  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 10Q  
13 CLK  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
High-Impedance State During Power Up  
and Power Down  
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
Package Options Include Plastic  
Small-Outline (DW) and Shrink  
Small-Outline (DB) Packages, Ceramic Chip  
Carriers (FK), Ceramic Flat (W) Package,  
and Plastic (NT) and Ceramic (JT) DIPs  
9D 10  
10D 11  
GND 12  
SN54ABT821 . . . FK PACKAGE  
(TOP VIEW)  
description  
These 10-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing wider buffer  
registers, I/O ports, bidirectional bus drivers with  
parity, and working registers.  
4
3
2
1
28 27 26  
25  
3D  
4D  
5D  
NC  
6D  
7D  
8D  
3Q  
4Q  
5Q  
NC  
6Q  
7Q  
8Q  
5
24  
23  
22  
21  
20  
19  
6
7
8
The ten flip-flops are edge-triggered D-type  
flip-flops. On the positive transition of the clock  
(CLK) input, the devices provide true data at the  
Q outputs.  
9
10  
11  
12 13 14 15 16 17 18  
A buffered output-enable (OE) input can be used  
to place the ten outputs in either a normal logic  
state (high or low logic levels) or a high-impe-  
dance state. In the high-impedance state, the  
outputs neither load nor drive the bus lines  
significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
NC – No internal connection  
OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can  
be entered while the outputs are in the high-impedance state.  
When V  
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup resistor;  
CC  
The SN54ABT821 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ABT821A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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