SN54ABT652A, SN74ABT652A
OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS072F – JANUARY 1991 – REVISED MAY 1997
SN54ABT652A . . . JT OR W PACKAGE
SN74ABT652A . . . DB, DW, NT, OR PW PACKAGE
(TOP VIEW)
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
CLKAB
SAB
OEAB
A1
V
CC
1
24
23
22
21
20
19
18
17
16
15
14
CLKBA
SBA
OEBA
B1
2
3
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
4
A2
5
Typical V
< 1 V at V
(Output Ground Bounce)
OLP
CC
A3
B2
6
= 5 V, T = 25°C
A
A4
B3
7
High-Drive Outputs (–32-mA I , 64-mA I
OH
)
OL
A5
B4
8
Package Options Include Plastic
A6
B5
9
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Package, and Plastic (NT)
and Ceramic (JT) DIPs
A7
B6
10
11
A8
B7
GND 12
13 B8
SN54ABT652A . . . FK PACKAGE
(TOP VIEW)
description
These devices consist of bus-transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
4
3
2
1
28 27 26
25
5
6
7
8
9
A1
A2
A2
NC
A4
OEBA
B1
B2
NC
B3
B4
Output-enable (OEAB and OEBA) inputs are
provided to control the transceiver functions.
Select-control (SAB and SBA) inputs are provided
to select either real-time or stored data for
transfer. The circuitry used for select control
eliminates the typical decoding glitch that occurs
in a multiplexer during the transition between
stored and real-time data. A low input selects
real-time data, and a high input selects stored
data. Figure 1 illustrates the four fundamental
bus-management functions that can be
performed with the ’ABT652A.
24
23
22
21
20
19
A5 10
A6 11
B5
12 13 14 15 16 17 18
NC – No internal connection
Data on the A- or B-data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions
attheappropriateclock(CLKABorCLKBA)inputs, regardlessoftheselect-orenable-controlinputs. WhenSAB
and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops
by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all
other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last
state.
To ensure the high-impedance state during power up or power down, OEBA should be tied to V
through a
CC
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
(B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the driver (A to B).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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