SN54ABT240, SN74ABT240A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS098I – JANUARY 1991 – REVISED JUNE 2002
SN54ABT240 . . . J OR W PACKAGE
SN74ABT240A . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
Typical V
(Output Ground Bounce)
OLP
<1 V at V
= 5 V, T = 25°C
CC
A
High-Drive Outputs (–32-mA I , 64-mA I
)
OL
OH
I
Supports Partial-Power-Down Mode
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
off
Operation
2OE
1Y1
2A4
1Y2
2A3
1Y3
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
13 2A2
12 1Y4
description
11
2A1
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. Together with the SN54ABT241,
SN54ABT240 . . . FK PACKAGE
(TOP VIEW)
SN74ABT241A,
SN54ABT244,
and
SN74ABT244A, these devices provide the choice
of selected combinations of inverting and
noninverting outputs, symmetrical active-low
output-enable (OE) inputs, and complementary
OE and OE inputs.
3
2
1
20 19
18
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
17
16
15
14
The SN54ABT240 and SN74ABT240A are
organized as two 4-bit buffers/line drivers with
separate OE inputs. When OE is low, the devices
pass inverted data from the A inputs to the Y
outputs. When OE is high, the outputs are in the
high-impedance state.
9 10 11 12 13
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
Tube
SN74ABT240AN
SN74ABT240AN
Tube
SN74ABT240ADW
SN74ABT240ADWR
SN74ABT240ANSR
SN74ABT240ADBR
SN74ABT240APWR
SNJ54ABT240J
SOIC – DW
ABT240A
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tube
–40°C to 85°C
SOP – NS
SSOP – DB
TSSOP – PW
CDIP – J
ABT240A
AB240A
AB240A
SNJ54ABT240J
SNJ54ABT240W
SNJ54ABT240FK
–55°C to 125°C
CFP – W
Tube
SNJ54ABT240W
SNJ54ABT240FK
LCCC – FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265