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5962-9317501MXA PDF预览

5962-9317501MXA

更新时间： 2024-02-14 13:21:37
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件信息通信管理
页数 文件大小 规格书
13页 189K
描述
16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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5962-9317501MXA 技术参数

生命周期：ActiveReach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.45
系列：ABTJESD-30 代码：R-GDFP-F48
长度：15.875 mm逻辑集成电路类型：BUS TRANSCEIVER
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装形状：RECTANGULAR封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED传播延迟（tpd）：4.6 ns
认证状态：Qualified座面最大高度：3.05 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BICMOS温度等级：MILITARY
端子形式：FLAT端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：9.655 mmBase Number Matches：1

5962-9317501MXA 数据手册

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SN54ABT16245A, SN74ABT16245A  
16-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCBS300F–MARCH 1994–REVISED JULY 2005  
FEATURES  
SN54ABT16245A. . . WD PACKAGE  
SN74ABT16245A. . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
•
•
•
•
•
Members of the Texas Instruments  
Widebus™ Family  
State-of-the-Art EPIC-IIB™ BiCMOS Design  
Significantly Reduces Power Dissipation  
1
48  
47  
46  
45  
44  
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42  
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40  
39  
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37  
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35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
Typical VOLP (Output Ground Bounce) <1 V at  
VCC = 5 V, TA = 25°C  
3
4
High-Impedance State During Power Up and  
Power Down  
5
6
Distributed VCC and GND Pin Configuration  
Minimizes High-Speed Switching Noise  
7
V
CC  
V
CC  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
Flow-Through Architecture Optimizes PCB  
Layout  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
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21  
22  
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24  
•
•
High-Drive Outputs (–32-mA IOH, 64-mA IOL)  
Latch-Up Performance Exceeds 500 mA Per  
JESD 70  
•
•
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Package Options Includes Plastic Thin Very  
Small-Outline (DGV), Shrink Small-Outline  
(DL), and Thin Shrink Small-Outline (DGG)  
Packages and 380-mil Fine-Pitch Ceramic  
(WD) Flat Package Using 25-mil  
V
CC  
V
CC  
2B5  
2B6  
GND  
2B7  
2B8  
2DIR  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
Center-to-Center Spacings  
DESCRIPTION  
The 'ABT16245A devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way  
communication between data buses. The control-function implementation minimizes external timing  
requirements.  
These devices can be used as two 8-bit transceviers or one 16-bit transceiver. They allow data transmission from  
the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)  
input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.  
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.  
However, to ensure the high-impendance state above 2.1 V, OE should be tied to VCC through a pullup resistor;  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54ABT16245A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT16245A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC-IIB are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1994–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
On products compliant to MIL-PRF-38535, all parameters are  
Instruments standard warranty. Production processing does not  
tested unless otherwise noted. On all other products, production  
necessarily include testing of all parameters.  
processing does not necessarily include testing of all parameters.  
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