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5962-8976501EA PDF预览

5962-8976501EA

更新时间: 2024-11-21 11:06:27
品牌 Logo 应用领域
德州仪器 - TI 运算电路逻辑集成电路
页数 文件大小 规格书
11页 266K
描述
具有快速进位的高速 CMOS 逻辑 4 位二进制全加器 | J | 16 | -55 to 125

5962-8976501EA 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.22
其他特性:WITH FULL INTERNAL LOOKAHEAD系列:HC/UH
JESD-30 代码:R-GDIP-T16长度:19.56 mm
负载电容(CL):50 pF逻辑集成电路类型:ADDER/SUBTRACTOR
最大I(ol):0.0052 A位数:4
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V最大电源电流(ICC):0.08 mA
Prop。Delay @ Nom-Sup:42 ns传播延迟(tpd):315 ns
认证状态:Qualified筛选级别:MIL-STD-883
座面最大高度:5.08 mm子类别:Arithmetic Circuit
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.92 mmBase Number Matches:1

5962-8976501EA 数据手册

 浏览型号5962-8976501EA的Datasheet PDF文件第2页浏览型号5962-8976501EA的Datasheet PDF文件第3页浏览型号5962-8976501EA的Datasheet PDF文件第4页浏览型号5962-8976501EA的Datasheet PDF文件第5页浏览型号5962-8976501EA的Datasheet PDF文件第6页浏览型号5962-8976501EA的Datasheet PDF文件第7页 
CD54HC283, CD74HC283,  
CD54HCT283, CD74HCT283  
Data sheet acquired from Harris Semiconductor  
SCHS176D  
High-Speed CMOS Logic  
4-Bit Binary Full Adder with Fast Carry  
November 1997 - Revised October 2003  
Features  
Description  
• Adds Two Binary Numbers  
The ’HC283 and ’HCT283 binary full adders add two 4-bit  
binary numbers and generate a carry-out bit if the sum  
exceeds 15.  
• Full Internal Lookahead  
[ /Title  
(CD74  
HC283  
,
CD74  
HCT28  
3)  
• Fast Ripple Carry for Economical Expansion  
• Operates with Both Positive and Negative Logic  
Because of the symmetry of the add function, this device  
can be used with either all active-high operands (positive  
logic) or with all active-low operands (negative logic). When  
using positive logic the carry-in input must be tied low if there  
is no carry-in.  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
/Sub-  
ject  
o
PART NUMBER  
CD54HC283F3A  
CD54HCT283F3A  
CD74HC283E  
TEMP. RANGE ( C)  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
(High  
Speed  
CMOS  
Logic  
4-Bit  
Binary  
Full  
• HC Types  
- 2V to 6V Operation  
CD74HC283M  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC283MT  
CD74HC283M96  
CD74HCT283E  
CD74HCT283M  
CD74HCT283MT  
CD74HCT283M96  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
Adder  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
l
OL OH  
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
Functional Diagram  
5
4
CD54HC283, CD54HCT283  
(CERDIP)  
CD74HC283, CD74HCT283  
(PDIP, SOIC)  
A0  
B0  
A1  
B1  
A2  
B2  
A3  
B3  
S0  
S1  
S2  
S3  
C
6
3
1
TOP VIEW  
2
S1  
B1  
A1  
S0  
A0  
B0  
1
2
3
4
5
6
7
8
16 V  
CC  
15 B2  
14 A2  
13 S2  
12 A3  
11 B3  
10 S3  
14  
15  
12  
13  
10  
9
11  
7
C
IN  
C
9
C
OUT  
GND  
IN  
OUT  
GND = 8  
= 16  
V
CC  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

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