Datasheet > 逻辑 > 总线驱动器/收发器> 5962-8681301RA

5962-8681301RA

更新时间： 2024-01-29 09:41:09

品牌	Logo	应用领域
德州仪器 - TI		总线驱动器总线收发器锁存器逻辑集成电路
页数	文件大小	规格书
14页	282K
描述
High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

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5962-8681301RA 技术参数

生命周期：	Obsolete	包装说明：	DIP,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.33	系列：	HC/UH
JESD-30 代码：	R-GDIP-T20	逻辑集成电路类型：	BUS DRIVER
位数：	8	功能数量：	1
端口数量：	2	端子数量：	20
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出特性：	3-STATE	输出极性：	INVERTED
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	传播延迟（tpd）：	265 ns
认证状态：	Not Qualified	座面最大高度：	5.08 mm
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	4.5 V	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm	Base Number Matches：	1

5962-8681301RA 数据手册

CD54/74HC533, CD54/74HCT533,

CD54/74HC563, CD74HCT563

Data sheet acquired from Harris Semiconductor

SCHS187C

High-Speed CMOS Logic Octal Inverting

Transparent Latch, Three-State Outputs

January 1998 - Revised July 2003

Features

Description

• Common Latch-Enable Control

• Common Three-State Output Enable Control

• Buffered Inputs

The ’HC533, ’HCT533, ’HC563, and CD74HCT563 are

high-speed Octal Transparent Latches manufactured with

silicon gate CMOS technology. They possess the low power

consumption of standard CMOS integrated circuits, as well as

the ability to drive 15 LSTTL devices.

[ /Title

(CD74H

C533,

• Three-State Outputs

CD74H

CT533,

CD74H

C563,

CD74H

CT563)

/Subject

(High

The outputs are transparent to the inputs when the latch

enable (LE) is high. When the latch enable (LE) goes low the

data is latched. The output enable (OE) controls the

three-state outputs. When the output enable (OE) is high the

outputs are in the high impedance state. The latch operation

is independent of the state of the output enable.

• Bus Line Driving Capacity

• Typical Propagation Delay = 13ns at V

= 5V,

C = 15pF, T = 25 C (Data to Output)

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

The ’HC533 and ’HCT533 are identical in function to the

’HC563 and CD74HCT563 but have different pinouts. The

’HC533 and ’HCT533 are similar to the ’HC373 and ’HCT373;

the latter are non-inverting types.

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

Speed

Ordering Information

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

TEMP. RANGE

• HC Types

- 2V to 6V Operation

PART NUMBER

CD54HC533F3A

CD54HC563F3A

CD54HCT533F3A

CD74HC533E

( C)

PACKAGE

20 Ld CERDIP

20 Ld PDIP

-55 to 125

- High Noise Immunity: N = 30%, N = 30% of V

IL IH CC

at V

= 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

CD74HC563E

20 Ld PDIP

V = 0.8V (Max), V = 2V (Min)

IL IH

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

CD74HC563M

20 Ld SOIC

20 Ld PDIP

CD74HCT533E

CD74HCT563E

CD74HCT563M

20 Ld PDIP

20 Ld SOIC

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...14

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