ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢂꢇ ꢈ ꢀꢁꢉ ꢃꢄ ꢅꢆ ꢂꢇ
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SCLS112D − DECEMBER 1982 − REVISED OCTOBER 2003
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 15 LSTTL Loads
D
D
Low Input Current of 1 µA Max
Permit Multiplexing from n Lines to One
Line
Low Power Consumption, 80-µA Max I
CC
D
Perform Parallel-to-Serial Conversion
Typical t = 9 ns
pd
6-mA Output Drive at 5 V
D
Strobe (Enable) Line Provided for
Cascading (N Lines to n Lines)
SN54HC153 . . . J OR W PACKAGE
SN74HC153 . . . D, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54HC153 . . . FK PACKAGE
(TOP VIEW)
1G
B
V
CC
2G
A
1
2
3
4
5
6
7
8
16
15
14
13
3
2
1
20 19
18
A
1C3
1C2
NC
4
5
6
7
8
1C3
1C2
1C1
1C0
1Y
17
16
15
14
2C3
NC
2C2
2C1
2C3
12 2C2
1C1
1C0
11
10
9
2C1
2C0
2Y
9 10 11 12 13
GND
NC − No internal connection
description/ordering information
Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data
selection to the AND-OR gates. Separate strobe (G) inputs are provided for each of the two 4-line sections.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube of 25
Tube of 40
Reel of 2500
Reel of 250
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
SN74HC153N
SN74HC153N
SN74HC153D
SN74HC153DR
SN74HC153DT
SN74HC153NSR
SN74HC153PW
SN74HC153PWR
SN74HC153PWT
SNJ54HC153J
SNJ54HC153W
SNJ54HC153FK
SOIC − D
SOP − NS
HC153
HC153
−40°C to 85°C
TSSOP − PW
HC153
CDIP − J
CFP − W
LCCC − FK
SNJ54HC153J
SNJ54HC153W
SNJ54HC153FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
ꢒ ꢙ ꢤ ꢜ ꢛꢧ ꢢꢡ ꢟꢠ ꢡꢛ ꢝꢤ ꢦꢘ ꢞꢙ ꢟ ꢟꢛ ꢕꢏ ꢍꢎ ꢖꢓ ꢮ ꢎꢇꢯꢂ ꢇꢂꢈ ꢞꢦꢦ ꢤꢞ ꢜ ꢞ ꢝꢣ ꢟꢣꢜ ꢠ ꢞ ꢜ ꢣ ꢟꢣ ꢠꢟꢣ ꢧ
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