Datasheet > 5962-0151101

5962-0151101

更新时间： 2024-11-08 22:17:43

品牌	Logo	应用领域
艾法斯 - AEROFLEX		静态存储器
页数	文件大小	规格书
14页	138K
描述
UT9Q512K32 16Megabit SRAM MCM

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5962-0151101 数据手册

Standard Products

QCOTS^TMUT9Q512K32 16Megabit SRAM MCM

Data Sheet

June, 2003

FEATURES

INTRODUCTION

25ns maximum (5 volt supply) address access time

The QCOTS^TMUT9Q512K32 Quantified Commercial

Off-the-Shelf product is a high-performance 2M byte

(16Mbit) CMOS static RAM multi-chip module (MCM),

organized as four individual 524,288 x 8 bit SRAMs with a

common output enable. Memory expansion is provided by

an active LOW chip enable (En), an active LOW output

enable (G), and three-state drivers. This device has a power-

down feature that reduces power consumption by more than

90% when deselected.

Asynchronous operation for compatible with industry

standard 512K x 8 SRAMs

TTL compatible inputs and output levels , three-state

bidirectional data bus

Typical radiation performance

- Total dose: 50krads

- SEL Immune >80 MeV-cm²/mg

- LET_TH(0.25) = >10 MeV-cm²/mg

- Saturated Cross Section (cm²) per bit, 5.0E -9

- <1E-8 errors/bit-day, Adams 90% geosynchronous

heavy ion

Writing to each memory is accomplished by taking chip

enable (En) input LOW and write enable ( Wn) inputs LOW.

Data on the eight I/O pins (DQ₀through DQ₇) is then written

into the location specified on the address pins (A₀through

A₁₈). Reading from the device is accomplished by taking

Packaging options:

- 68-lead dual cavity ceramic quad flatpack (CQFP) -

(weight 7.37 grams)

chip enable (En) and output enable ( G) LOW while forcing

write enable (Wn) HIGH. Under these conditions, the

contents of the memory location specified by the address

pins will appear on the I/O pins.

Standard Microcircuit Drawing5962-01511

- QML T and Q compliant part

The input/output pins are placed in a high impedance state

when the device is deselected (En HIGH), the outputs are

disabled (G HIGH), or during a write operation (En LOW

and Wn LOW). Perform 8, 16, 24 or 32 bit accesses by

making Wn along with En a common input to any

combination of the discrete memory die.

A(18:0)

512K x 8

DQ(23:16)

DQ2(7:0)

DQ(15:8)

DQ1(7:0)

DQ(31:24)

DQ3(7:0)

DQ(7:0)

DQ0(7:0)

Figure 1. UT9Q512K32 SRAM Block Diagram

12 3 4 5 6 7...14

中文翻译

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与5962-0151101相关器件

型号	品牌	获取价格	描述	数据表
5962-0151101QXC	AEROFLEX	获取价格	UT9Q512K32 16Megabit SRAM MCM
5962-0151101TXC	AEROFLEX	获取价格	UT9Q512K32 16Megabit SRAM MCM
5962-0151201VPA	TI	获取价格	具有 40V VDD 和 5V 稳压输出的航天级 QMLV 1.5A/1.5A 双通
5962-0151301QXX	WEDC	获取价格	Liquid Crystal Driver, 256-Segment, CMOS, DIE-268
5962-0151502QXC	ACTEL	获取价格	Field Programmable Gate Array, 72000 Gates, 139MHz, 6036-Cell, CMOS, CQFP256, CERAMIC, QFP
5962-0151503QYC	ACTEL	获取价格	Field Programmable Gate Array, 72000 Gates, 116MHz, 6036-Cell, CMOS, CQFP208, CERAMIC, QFP
5962-0151504QYX	ACTEL	获取价格	Field Programmable Gate Array, 72000 Gates, CMOS, CQFP208, CERAMIC, QFP-208
5962-0151507QYX	ACTEL	获取价格	Field Programmable Gate Array, 72000 Gates, CMOS, CQFP208, CERAMIC, QFP-208
5962-0151801QXC	MICROSEMI	获取价格	Field Programmable Gate Array, 32000 Gates, CMOS, CQFP256, CERAMIC, QFP-256
5962-0151801QYC	ACTEL	获取价格	Field Programmable Gate Array, 32000 Gates, 206MHz, 2880-Cell, CMOS, CQFP208, CERAMIC, QFP

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