Datasheet > 570AAA000625DGR

570AAA000625DGR

更新时间： 2024-11-05 23:47:39

品牌	Logo	应用领域
芯科 - SILICON		石英晶振
页数	文件大小	规格书
36页	2309K
描述
ANY, I2C PROGRAMMABLE XO

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

570AAA000625DGR 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	LCC8,.2X.28,100	Reach Compliance Code：	compliant
风险等级：	5.57	安装特点：	SURFACE MOUNT
端子数量：	8	最大工作频率：	1417.5 MHz
最小工作频率：	10 MHz	标称工作频率：	1417.5 MHz
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	CERAMIC	封装等效代码：	LCC8,.2X.28,100
电源：	3.3 V	认证状态：	Not Qualified
子类别：	Other Oscillators	最大压摆率：	130 mA
标称供电电压：	3.3 V	表面贴装：	YES
Base Number Matches：	1

570AAA000625DGR 数据手册

Si570/Si571

10 MHZ TO 1.4 GHZ I²C PROGRAMMABLE XO/VCXO

Features



Any programmable output

frequencies from 10 to 945 MHz and

select frequencies to 1.4 GHz



Internal fixed crystal frequency

ensures high reliability and low

aging

Si5602



Available LVPECL, CMOS,

LVDS, and CML outputs

Industry-standard 5x7 mm

package

Pb-free/RoHS-compliant

1.8, 2.5, or 3.3 V supply



I²C serial interface

3rd generation DSPLL^®with superior

jitter performance

3x better frequency stability than

SAW-based oscillators



Applications

Ordering Information:



SONET/SDH

xDSL

10 GbE LAN/WAN

ATE



High performance

instrumentation

Low-jitter clock generation

Optical modules

Clock and data recovery

See page 31.



Pin Assignments:

See page 30.

Description

(Top View)

The Si570 XO/Si571 VCXO utilizes Skyworks Solutions’ advanced DSPLL^®

circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-

programmable to any output frequency from 10 to 945 MHz and select frequencies

to 1400 MHz with <1 ppb resolution. The device is programmed via an I²C serial

interface. Unlike traditional XO/VCXOs where a different crystal is required for

each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL

clock synthesis IC to provide any-frequency operation. This IC-based approach

allows the crystal resonator to provide exceptional frequency stability and

reliability. In addition, DSPLL clock synthesis provides superior supply noise

rejection, simplifying the task of generating low-jitter clocks in noisy environments

typically found in communication systems.

SDA

V_DD

CLK–

CLK+

GND

SCL

Functional Block Diagram

Si570

CLK- CLK+

V_DD

SDA

V_C

V_DD

10-1400 MHz

DSPLL^Clock

Synthesis

Fixed

Frequency

SDA

SCL

CLK–

CLK+

Si571 only

GND

ADC

SCL

GND

Si571

V_C

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

Rev. 1.6 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 15, 2021

12 3 4 5 6 7...36

中文翻译

下载PDF

与570AAA000625DGR相关器件

型号	品牌	获取价格	描述	数据表
570AAA000647DG	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA000647DGR	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA000678DG	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA000678DGR	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA000759DGR	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA000983DG	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA000983DGR	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA001230DG	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA001342DG	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO
570AAA001343DG	SILICON	获取价格	ANY, I2C PROGRAMMABLE XO

与570AAA000625DGR相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

9
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

35
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

31

产品中心

服务支持

精选活动

关于我们

帮助中心

570AAA000625DGR

570AAA000625DGR 技术参数

570AAA000625DGR 数据手册

与570AAA000625DGR相关器件

与570AAA000625DGR相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

570AAA000625DGR

570AAA000625DGR 技术参数

570AAA000625DGR 数据手册

与570AAA000625DGR相关器件

与570AAA000625DGR相关文章

您还可以找

您在本页遇到什么问题？