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570AAA000541DGR PDF预览

570AAA000541DGR

更新时间: 2024-11-06 09:21:43
品牌 Logo 应用领域
芯科 - SILICON /
页数 文件大小 规格书
32页 204K
描述
Oscillator, 10MHz Min, 1417.5MHz Max, 1417.5MHz Nom

570AAA000541DGR 数据手册

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Si570/Si571  
10 MHZ TO 1.4 GHZ I2C PROGRAMMABLE XO/VCXO  
Features  
Any programmable output  
frequencies from 10 to 945 MHz and  
select frequencies to 1.4 GHz  
Internal fixed crystal frequency  
ensures high reliability and low  
aging  
2
Available LVPECL, CMOS,  
LVDS, and CML outputs  
Industry-standard 5x7 mm  
package  
Pb-free/RoHS-compliant  
1.8, 2.5, or 3.3 V supply  
I C serial interface  
®
3rd generation DSPLL with superior  
jitter performance  
3x better frequency stability than  
SAW-based oscillators  
Applications  
Ordering Information:  
SONET/SDH  
xDSL  
10 GbE LAN/WAN  
Low-jitter clock generation  
Optical modules  
Clock and data recovery  
See page 27.  
Pin Assignments:  
Description  
See page 26.  
®
The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL  
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are  
user-programmable to any output frequency from 10 to 945 MHz and select  
frequencies to 1400 MHz with <1 ppb resolution. The device is programmed  
(Top View)  
SDA  
7
2
via an I C serial interface. Unlike traditional XO/VCXOs where a different  
NC  
VDD  
1
2
3
6
5
4
crystal is required for each output frequency, the Si57x uses one fixed-  
frequency crystal and a DSPLL clock synthesis IC to provide any-frequency  
operation. This IC-based approach allows the crystal resonator to provide  
exceptional frequency stability and reliability. In addition, DSPLL clock  
synthesis provides superior supply noise rejection, simplifying the task of  
generating low-jitter clocks in noisy environments typically found in  
communication systems.  
OE  
CLK–  
CLK+  
GND  
8
SCL  
Functional Block Diagram  
Si570  
CLK- CLK+  
VDD  
SDA  
7
OE  
VC  
VDD  
1
2
3
6
5
4
10-1400 MHz  
DSPLLClock  
Synthesis  
Fixed  
Frequency  
XO  
SDA  
SCL  
OE  
CLK–  
CLK+  
Si571 only  
GND  
ADC  
8
SCL  
GND  
Si571  
VC  
Rev. 1.4 4/13  
Copyright © 2013 by Silicon Laboratories  
Si570/Si571  

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