Datasheet > 561-12.0M-3FNP210A

561-12.0M-3FNP210A

更新时间： 2024-11-11 09:56:27

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OSCILENT		/
页数	文件大小	规格书
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描述
HCMOS/TTL Output Clock Oscillator, 12MHz Nom, SMD, 6 PIN

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561-12.0M-3FNP210A 数据手册

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Oscilent Corporation | 561 Series VCXO - Voltage Control Crystal Oscillator

Page 1 of 2

VCXO Surface Mount

Series Number

Package

Description

Last Modified

561

5 x 7 Ceramic 6 Pad

HCMOS / TTL

Jan. 01 2007

FEATURES

- 2.0mm low profile

- Wave form symmetry of 40/60%

- SMD Version 6 Pad

- 3.3V operation (optional)

- Tape and Reel

- RoHs / Lead Free compliant

OPERATING CONDITIONS / ELECTRICAL CHARACTERISTICS

PARAMETERS

Output Logic

Input Voltage (VDD)

CONDITIONS

CHARACTERISTICS

HCMOS / TTL Output

UNITS

3.3 ±10%

5.0 ±10%

VDC

1.5440 ~ 52.0

MHz

°C

Frequency Range (f )

0 ~ +70 (Std.) / -40 ~ 85 (Option)

-55 ~ +125

Operating Temperature (T

Storage Temperature (T

)

OPR

)

°C

STG

a + b + c + d

±20, ±25, ±50, ±100 max.

Inclusive of Overall Stability

PPM

Overall Frequency Stability

(a) Frequency Tolerance

(b) Temperature Stability

(d) Load Stability

Inclusive of Overall Stability (Operating Temperature)

Inclusive of Overall Stability (VDD ±5%)

Inclusive of Overall Stability (RL ±5%)

10 ~ 25 max.

15 ~ 35 max.

PPM/Y

Input Current (I

Aging

)

@ 25°C

±3 max.

10 max. (0.4V to 2.4V / TTL; Waveform / HCMOS)

Rise Time (T ) / Fall Time (T )

1.65 ±1.35

2.5 ±2

Pin 1 Control Voltage Range

TTL Load

HCMOS Load

TTL Load

HCMOS Load

2.4 min.

VDC

Output Voltage High "1" VOH

2.7 min.

VDD-0.5 min.

0.4 max.

0.5 max.

Output Voltage Low "0" VOL

Duty Cycle

50 ±10 (Std.) / 50 ±5 (Option)

10 max.

Start-Up Time (T )

(One Sigma)

±25 max.

Jitter

Linearity

±20 (Std.) / ±10 (Option)

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