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557G-06LFT PDF预览

557G-06LFT

更新时间: 2024-11-26 01:16:31
品牌 Logo 应用领域
艾迪悌 - IDT PC
页数 文件大小 规格书
12页 163K
描述
2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX

557G-06LFT 数据手册

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DATASHEET  
2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX  
ICS557-06  
Description  
Features  
The ICS557-06 is a two to four differential clock mux  
designed for use in PCI-Express applications. The device  
selects one of the two differential HCSL input pairs and fans  
out to four pairs of differential HCSL or LVDS outputs.  
Packaged in 20-pin TSSOP  
Pb (lead) free packaging  
Operating voltage of 3.3 V  
Low power consumption  
Input differential clock of up to 200 MHz  
Jitter 60 ps (cycle-to-cycle)  
Output-to-output skew of 50 ps  
Available in industrial temperature range (-40 to +85°C)  
For PCIe Gen2/3 applications, see the 5V41067A  
Block Diagram  
OE  
VDD  
2
CLKA  
CLKA  
CLKB  
IN1  
IN1  
CLKB  
CLKC  
MUX  
2 to 1  
IN2  
IN2  
CLKC  
CLKD  
CLKD  
2
Rr (IREF)  
SEL  
GND  
PD  
IDT® 2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX  
1
ICS557-06  
REV M 070512  

557G-06LFT 替代型号

型号 品牌 替代类型 描述 数据表
557G-06LF IDT

完全替代

2 TO 4 DIFFERENTIAL PCIE GEN1 CLOCK MUX
ICS557G-06 IDT

完全替代

1 TO 4 HCSL CLOCK BUFFER
ICS557G-06LF IDT

功能相似

1 TO 4 HCSL CLOCK BUFFER

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557GI-05A ICSI

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