5秒后页面跳转
捷配首页

Datasheet > 54LS164
54LS164 PDF预览

54LS164

更新时间： 2024-09-22 22:45:31
品牌 Logo 应用领域
美国国家半导体 - NSC 移位寄存器
页数 文件大小 规格书
6页 144K
描述
8-Bit Serial In/Parallel Out Shift Registers

阅读下载

中文翻译

获取价格

54LS164 数据手册

 浏览型号54LS164的Datasheet PDF文件第2页浏览型号54LS164的Datasheet PDF文件第3页浏览型号54LS164的Datasheet PDF文件第4页浏览型号54LS164的Datasheet PDF文件第5页浏览型号54LS164的Datasheet PDF文件第6页 
June 1989  
54LS164/DM54LS164/DM74LS164  
8-Bit Serial In/Parallel Out Shift Registers  
General Description  
Features  
Y
Gated (enable/disable) serial inputs  
These 8-bit shift registers feature gated serial inputs and an  
asynchronous clear. A low logic level at either input inhibits  
entry of the new data, and resets the first flip-flop to the low  
level at the next clock pulse, thus providing complete con-  
trol over incoming data. A high logic level on either input  
enables the other input, which will then determine the state  
of the first flip-flop. Data at the serial inputs may be changed  
while the clock is high or low, but only information meeting  
the setup and hold time requirements will be entered. Clock-  
ing occurs on the low-to-high level transition of the clock  
input. All inputs are diode-clamped to minimize transmis-  
sion-line effects.  
Y
Fully buffered clock and serial inputs  
Y
Asynchronous clear  
Y
Typical clock frequency 36 MHz  
Y
Typical power dissipation 80 mW  
Y
Alternate Military/Aerospace device (54LS164) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Connection Diagram  
Function Table  
Dual-In-Line Package  
Inputs  
Clock  
Outputs  
Clear  
A
B
Q
A
Q
...  
Q
H
B
L
H
H
H
H
X
L
X
X
H
L
X
X
H
X
L
L
L
...  
...  
...  
...  
...  
L
Q
Q
B0  
Q
An  
Q
An  
Q
An  
Q
H0  
Q
Gn  
Q
Gn  
Q
Gn  
A0  
H
u
u
u
L
L
X
e
e
e
H
X
High Level (steady state), L  
Low Level (steady state)  
Don’t Care (any input, including transitions)  
e
Transition from low to high level  
u
Q
e
indicated steady-state input conditions were established.  
,
Q
B0  
,
Q
H0  
The level of  
Q , Q , or Q , respectively, before the  
A B H  
A0  
e
the clock; indicates a one-bit shift.  
Q
, Q  
The level of Q or Q before the most recent  
A
transition of  
u
An  
Gn  
G
TL/F/6398–1  
Order Number 54LS164DMQB, 54LS164FMQB,  
54LS164LMQB, DM54LS164J, DM54LS164W,  
DM74LS164M or DM74LS164N  
See NS Package Number E20A,  
J14A, M14A, N14A or W14B  
Logic Diagram  
TL/F/6398–2  
C
1995 National Semiconductor Corporation  
TL/F/6398  
RRD-B30M105/Printed in U. S. A.  
123456

中文翻译

下载PDF

与54LS164相关器件

型号 品牌 获取价格 描述 数据表
54LS164/B2A YAGEO

获取价格

 		Serial In Parallel Out, LS Series, 8-Bit, Right Direction, True Output, TTL, CQCC20
54LS164/B2A PHILIPS

获取价格

 		Shift Register, 8-Bit, TTL, CQCC20
54LS164/B2AJC MOTOROLA

获取价格

 		LS SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CQCC20, CERAMIC
54LS164/BCA YAGEO

获取价格

 		Serial In Parallel Out, LS Series, 8-Bit, Right Direction, True Output, TTL, CDIP14
54LS164/BCX YAGEO

获取价格

 		Serial In Parallel Out, LS Series, 8-Bit, Right Direction, True Output, TTL, CDIP14, CERAM
54LS164DM TI

获取价格

 		IC,SHIFT REGISTER,LS-TTL,DIP,14PIN,CERAMIC
54LS164DMQB FAIRCHILD

获取价格

 		Serial In Parallel Out, LS Series, 8-Bit, Right Direction, True Output, TTL, CDIP14, CERAM
54LS164DMQB NSC

获取价格

 		8-Bit Serial In/Parallel Out Shift Registers
54LS164FMQB NSC

获取价格

 		8-Bit Serial In/Parallel Out Shift Registers
54LS164FMQB FAIRCHILD

获取价格

 		Serial In Parallel Out, LS Series, 8-Bit, Right Direction, True Output, TTL, CDFP14, CERAM

与54LS164相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证