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54F544SDM PDF预览

54F544SDM

更新时间: 2024-11-10 22:36:39
品牌 Logo 应用领域
美国国家半导体 - NSC 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
10页 189K
描述
Octal Registered Transceiver

54F544SDM 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP24,.3Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.37Is Samacsys:N
其他特性:INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:F/FAST
JESD-30 代码:R-GDIP-T24JESD-609代码:e0
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.048 A位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):130 mAProp。Delay @ Nom-Sup:18 ns
传播延迟(tpd):11.5 ns认证状态:Not Qualified
座面最大高度:5.715 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:7.62 mmBase Number Matches:1

54F544SDM 数据手册

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December 1994  
54F/74F544  
Octal Registered Transceiver  
General Description  
Features  
Y
8-bit octal transceiver  
The ’F544 octal transceiver contains two sets of D-type  
latches for temporary storage of data flowing in either direc-  
tion. Separate Latch Enable and Output Enable inputs are  
provided for each register to permit independent control of  
inputting and outputting in either direction of data flow. The  
A outputs are guaranteed to sink 24 mA (20 mA Mil) while  
the B outputs are rated for 64 mA (48 mA Mil). The ’F544  
inverts data in both directions.  
Y
Back-to-back registers for storage  
Y
Separate controls for data flow in each direction  
Y
A
outputs sink 24 mA (20 mA Mil), B outputs sink  
64 mA (48 mA Mil)  
300 mil slim PDIP  
Y
Package  
Commercial  
74F544SPC  
Military  
Package Description  
Number  
N24C  
J24A  
24-Lead (0.300 Wide) Molded Dual-In-Line  
×
54F544DM (Note 2)  
54F544SDM (Note 2)  
24-Lead Ceramic Dual-In-Line  
J24F  
24-Lead (0.300 Wide) Ceramic Dual-In-Line  
×
74F544SC (Note 1)  
74F544MSA (Note 1)  
M24B  
MSA24  
W24C  
E28A  
24-Lead (0.300 Wide) Molded Small Outline, JEDEC  
×
24-Lead Molded Shrink Small Outline, EIAJ, Type II  
24-Lead Cerpack  
54F544FM (Note 2)  
54F544LM (Note 2)  
24-Lead Ceramic Leadless Chip Carrier, Type C  
e
Note 1: Devices also available in 13 reel. Use suffix  
SCX and MSAX.  
×
Note 2: Military grade device with environmental and burn-in processing. Use suffix  
e
DMQB, FMQB and LMQB  
Logic Symbols  
IEEE/IEC  
TL/F/9555–2  
TL/F/9555–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9555  
RRD-B30M75/Printed in U. S. A.  

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