54F533SJCQB

更新时间： 2024-11-01 03:45:39

品牌	Logo	应用领域
美国国家半导体 - NSC		锁存器
页数	文件大小	规格书
8页	168K
描述
Octal Transparent Latch with TRI-STATE Outputs

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数据手册

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54F533SJCQB 数据手册

May 1995

54F/74F533

Octal Transparent Latch with TRI-STATE Outputs

General Description

Features

Eight latches in a single package

The ’F533 consists of eight latches with TRI-STATE outputs

for bus organized system applications. The flip-flops appear

transparent to the data when Latch Enable (LE) is HIGH.

When LE is LOW, the data that meets the setup times is

latched. Data appears on the bus when the Output Enable

(OE) is LOW. When OE is HIGH the bus output is in the high

impedance state. The ’F533 is the same as the ’F373, ex-

cept that the outputs are inverted.

TRI-STATE outputs for bus interfacing

Inverted version of the ’F373

Guaranteed 4000V minimum ESD protection

Package

Commercial

74F533PC

Military

Package Description

Number

N20A

J20A

20-Lead (0.300 Wide) Molded Dual-In-Line

54F533DM (Note 2)

20-Lead Ceramic Dual-In-Line

74F533SC (Note 1)

74F533SJ (Note 1)

M20B

M20D

W20A

E20A

20-Lead (0.300 Wide) Molded Small Outline, JEDEC

20-Lead (0.300 Wide) Molded Small Outline, EIAJ

54F533FM (Note 2)

54F533LM (Note 2)

20-Lead Cerpack

20-Lead Ceramic Leadless Chip Carrier, Type C

Note 1: Devices also available in 13 reel. Use suffix

SCX and SJX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix

DMQB, FMQB and LMQB.

Logic Symbols

Connection Diagrams

Pin Assignment

for DIP, SOIC and Flatpak

Pin Assignment

for LCC

IEEE/IEC

TL/F/9548–3

TL/F/9548–4

TL/F/9548–2

TL/F/9548–1

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/9548

RRD-B30M75/Printed in U. S. A.

12 3 4 5 6 7 8

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