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54F32FM PDF预览

54F32FM

更新时间: 2024-11-24 22:36:43
品牌 Logo 应用领域
美国国家半导体 - NSC 栅极逻辑集成电路
页数 文件大小 规格书
6页 143K
描述
Quad 2-Input OR Gate

54F32FM 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:CERAMIC, FP-14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.24
Is Samacsys:N其他特性:4000V ESD PROTECTION
系列:F/FASTJESD-30 代码:R-GDFP-F14
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:OR GATE最大I(ol):0.02 A
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装等效代码:FL14,.3
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):15.5 mAProp。Delay @ Nom-Sup:7.5 ns
传播延迟(tpd):7.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2.032 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.2865 mmBase Number Matches:1

54F32FM 数据手册

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December 1994  
54F/74F32  
Quad 2-Input OR Gate  
General Description  
This device contains four independent gates, each of which  
performs the logic OR function.  
Features  
Y
Guaranteed 4000V minimum ESD protection  
Package  
Commercial  
74F32PC  
Military  
Package Description  
Number  
N14A  
J14A  
14-Lead (0.300 Wide) Molded Dual-In-Line  
×
54F32DM (Note 2)  
14-Lead Ceramic Dual-In-Line  
74F32SC (Note 1)  
74F32SJ (Note 1)  
M14A  
M14D  
W14B  
E20A  
14-Lead (0.150 Wide) Molded Small Outline, JEDEC  
×
14-Lead (0.300 Wide) Molded Small Outline, EIAJ  
×
54F32FM (Note 2)  
54F32LM (Note 2)  
14-Lead Cerpack  
20-Lead Ceramic Leadless Chip Carrier, Type C  
e
Note 1: Devices also available in 13 reel. Use suffix  
SCX and SJX.  
×
Note 2: Military grade device with environmental and burn-in processing. Use suffix  
e
DMQB, FMQB and LMQB.  
Logic Symbol  
Connection Diagrams  
IEEE/IEC  
Pin Assignment for  
DIP, SOIC and Flatpak  
Pin Assignment  
for LCC  
TL/F/9463–3  
TL/F/9463–2  
TL/F/9463–1  
Unit Loading/Fan Out  
54F/74F  
Pin Names  
Description  
U.L.  
Input I /I  
IH IL  
Output I /I  
HIGH/LOW  
OH OL  
b
20 mA/ 0.6 mA  
b
1 mA/20 mA  
A , B  
n
Inputs  
1.0/1.0  
50/33.3  
n
O
Outputs  
n
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9463  
RRD-B30M75/Printed in U. S. A.  

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