November 1994
54F/74F138
1-of-8 Decoder/Demultiplexer
General Description
Features
Y
Demultiplexing capability
The ’F138 is a high-speed 1-of-8 decoder/demultiplexer.
This device is ideally suited for high-speed bipolar memory
chip select address decoding. The multiple input enables
allow parallel expansion to a 1-of-24 decoder using just
three ’F138 devices or a 1-of-32 decoder using four ’F138
devices and one inverter.
Y
Multiple input enable for easy expansion
Y
Active LOW mutually exclusive outputs
Y
Guaranteed 4000V minimum ESD protection
Package
Commercial
74F138PC
Military
Package Description
Number
N16E
J16A
16-Lead (0.300 Wide) Molded Dual-In-Line
×
54F138DM (Note 2)
16-Lead Ceramic Dual-In-Line
74F138SC (Note 1)
74F138SJ (Note 1)
M16A
M16D
W16A
E20A
16-Lead (0.150 Wide) Molded Small Outline, JEDEC
×
16-Lead (0.300 Wide) Molded Small Outline, EIAJ
×
54F138FM (Note 2)
54F138LM (Note 2)
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier, Type C
e
Note 1: Devices also available in 13 reel. Use suffix
SCX and SJX.
×
Note 2: Military grade device with environmental and burn-in processing. Use suffix
e
DMQB, FMQB and LMQB.
Logic Symbols
Connection Diagrams
Pin Assignment for DIP,
SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9478–3
IEEE/IEC
TL/F/9478–1
TL/F/9478–2
TL/F/9478–6
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/9478
RRD-B30M75/Printed in U. S. A.