Datasheet > 54ACTQ374FM

54ACTQ374FM

更新时间： 2024-02-16 08:14:47

品牌	Logo	应用领域
德州仪器 - TI		驱动输出元件逻辑集成电路
页数	文件大小	规格书
12页	221K
描述
ACT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20, CERPACK-20

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技术参数
数据手册

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54ACTQ374FM 技术参数

生命周期：	Obsolete	包装说明：	DFP,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.68	Is Samacsys：	N
系列：	ACT	JESD-30 代码：	R-GDFP-F20
负载电容（CL）：	50 pF	逻辑集成电路类型：	BUS DRIVER
位数：	8	功能数量：	1
端口数量：	2	端子数量：	20
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK
传播延迟（tpd）：	11.5 ns	认证状态：	Not Qualified
座面最大高度：	2.286 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子形式：	FLAT
端子节距：	1.27 mm	端子位置：	DUAL
宽度：	6.731 mm	Base Number Matches：	1

54ACTQ374FM 数据手册

March 1993

54ACQ/74ACQ374 54ACTQ/74ACTQ374

Quiet Series Octal D Flip-Flop

with TRI-STATE Outputs

General Description

Features

and I

reduced by 50%

The ’ACQ/’ACTQ374 is a high-speed, low-power octal D-

type flip-flop featuring separate D-type inputs for each flip-

flop and TRI-STATE outputs for bus-oriented applications. A

buffered Clock (CP) and Output Enable (OE) are common to

all flip-flops.

Guaranteed simultaneous switching noise level and

dynamic threshold performance

Guaranteed pin-to-pin skew AC performance

Improved latch-up immunity

The ’ACQ/’ACTQ374 utilizes Quiet Series technology to

guarantee quiet output switching and improve dynamic

threshold performance. FACT Quiet Series^TMfeatures

GTO^TMoutput control and undershoot corrector in addition

to a split ground bus for superior performance.

Buffered positive edge-triggered clock

TRI-STATE outputs drive bus lines or buffer memory

address registers

Outputs source/sink 24 mA

Faster prop delays than the standard ’AC/’ACT374

4 kV minimum ESD immunity

Standard Military Drawing (SMD)

Ð ’ACTQ374: 5962-92189

Ð ’ACQ374: 5962-92179

Logic Symbols

Connection Diagrams

Pin Assignment for DIP,

Flatpak, QSOP and SOIC

IEEE/IEC

TL/F/10238–1

TL/F/10238–3

TL/F/10238–2

Pin Assignment

for LCC

Pin Names

Description

Data Inputs

D –D

Clock Pulse Input

TRI-STATE Output Enable Input

TRI-STATE Outputs

O –O

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

FACT^TM, FACT Quiet Series^TM, and GTO^TMare trademarks of National Semiconductor Corporation.

TL/F/10238–4

1995 National Semiconductor Corporation

TL/F/10238

RRD-B30M75/Printed in U. S. A.

12 3 4 5 6 7...12

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