54ACT11030, 74ACT11030
8-INPUT POSITIVE-NAND GATES
SCLS050 – MARCH 1987 – REVISED APRIL 1993
54ACT11030 . . . J PACKAGE
74ACT11030 . . . D OR N PACKAGE
(TOP VIEW)
• Inputs Are TTL-Voltage Compatible
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
C
B
A
D
E
F
V
NC
G
1
2
3
4
5
6
7
14
13
12
11
10
9
• EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
GND
Y
NC
NC
CC
• 500-mA Typical Latch-Up Immunity
at 125°C
H
8
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
54ACT11030 . . . FK PACKAGE
(TOP VIEW)
description
Thesedevicescontainasingle8-inputNANDgate
and perform the following Boolean functions in
positive logic:
3
2
1
20 19
18
G
D
NC
C
4
5
6
7
8
17
16
15
14
NC
H
Y = A • B • C • D • E • F • G • H or
Y = A + B + C + D + E + F + G + H
NC
NC
NC
B
9 10 11 12 13
The 54ACT11030 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The 74ACT11030 is characterized for
operation from –40°C to 85°C.
NC – No internal connection
FUNCTION TABLE
INPUTS
A THRU H
OUTPUT
Y
All inputs H
L
One or more inputs L
H
†
logic symbol
logic diagram (positive logic)
3
A
3
A
&
2
2
B
B
1
1
C
C
14
D
14
D
5
5
Y
13
E
13
E
Y
12
F
12
F
9
9
G
G
8
8
H
H
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265