Datasheet > 54ACT11027_09

54ACT11027_09

更新时间： 2022-10-12 16:37:23

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
5页	70K
描述
TRIPLE 3-INPUT POSITIVE-NOR GATES

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54ACT11027_09 数据手册

54ACT11027, 74ACT11027

TRIPLE 3-INPUT POSITIVE-NOR GATES

SCAS020A – D2957, JULY 1987 – REVISED APRIL 1993

54ACT11027 . . . J PACKAGE

74ACT11027 . . . D OR N PACKAGE

(TOP VIEW)

• Inputs Are TTL-Voltage Compatible

• Flow-Through Architecture Optimizes

PCB Layout

• Center-Pin V

and GND Configurations

Minimize High-Speed Switching Noise

GND

• EPIC (Enhanced-Performance Implanted

CMOS) 1- m Process

• 500-mA Typical Latch-Up Immunity at 125°C

• Package Options Include Plastic

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

54ACT11027 . . . FK PACKAGE

(TOP VIEW)

description

These devices contain three independent 3-input

NOR gates. They perform the Boolean functions

Y = A + B + C or Y = A B C in positive logic.

20 19

The 54ACT11027 is characterized for operation

over the full military temperature range of –55°C

to 125°C. The 74ACT11027 is characterized for

operation from – 40°C to 85°C.

14 3C

9 10 11 12 13

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

NC – No internal connection

†

logic symbol

logic diagram (positive logic)

≥ 1

†

This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

2–1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5

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