Si514
2
ANY-FREQUENCY I C PROGRAMMABLE XO (100 kHZ TO 250 MHZ)
Features
Si5602
Programmable to any frequency
from 100 kHz to 250 MHz
0.026 ppb frequency tuning
resolution
Glitch suppression on OE, power
on and frequency transitions
1 ps phase jitter (rms, max)
2- to 4-week lead times
Total stability includes 10-year
aging
On-chip LDO for power supply
noise filtering
3.3, 2.5, or 1.8 V operation
Differential (LVPECL, LVDS,
HCSL) or CMOS output options
Optional integrated 1:2 CMOS
fanout buffer
Ordering Information:
Industry standard 5 x 7 and
See page 25.
3.2 x 5 mm packages
o
–40 to 85 C operation
Comprehensive production test
coverage includes crystal ESR and
DLD
Pin Assignments:
See page 24.
Applications
All-digital PLLs
Datacom
VDD
1
2
3
6
5
4
SDA
SCL
GND
DAC+ VCXO replacement
SONET/SDH/OTN
3G-SDI/HD-SDI/SDI
Industrial automation
FPGA/ASIC clock generation
FPGA synchronization
CLK–
CLK+
Description
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The Si514 user-programmable I C XO utilizes Silicon Laboratories' advanced PLL
technology to provide any frequency from 100 kHz to 250 MHz with programming
resolution of 0.026 parts per billion. The Si514 uses a single integrated crystal and
Silicon Labs’ proprietary DSPLL synthesizer to generate any frequency across this
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range using simple I C commands. Ultra-fine tuning resolution replaces DACs and
VCXOs with an all-digital PLL solution that improves performance where
synchronization is necessary or in free-running reference clock applications. This
solution provides superior supply noise rejection, simplifying low jitter clock
generation in noisy environments. Crystal ESR and DLD are individually
production-tested to guarantee performance and enhance reliability.
The Si514 is factory-configurable for a wide variety of user specifications, including
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startup frequency, I C address, supply voltage, output format, and stability. Specific
configurations are factory-programmed at time of shipment, eliminating long lead
times and non-recurring engineering charges associated with custom frequency
oscillators.
Functional Block Diagram
Preliminary Rev. 0.9 3/11
Copyright © 2011 by Silicon Laboratories
Si514