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49FCT3805SOI8 PDF预览

49FCT3805SOI8

更新时间: 2024-11-07 14:49:31
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
7页 72K
描述
Clock Driver, CMOS, PDSO20

49FCT3805SOI8 技术参数

是否Rohs认证:不符合生命周期:Obsolete
Reach Compliance Code:not_compliant风险等级:5.92
Is Samacsys:NJESD-30 代码:R-PDSO-G20
JESD-609代码:e0最大I(ol):0.024 A
湿度敏感等级:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:3.3 V
Prop。Delay @ Nom-Sup:5.8 ns认证状态:Not Qualified
子类别:Clock Drivers标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

49FCT3805SOI8 数据手册

 浏览型号49FCT3805SOI8的Datasheet PDF文件第2页浏览型号49FCT3805SOI8的Datasheet PDF文件第3页浏览型号49FCT3805SOI8的Datasheet PDF文件第4页浏览型号49FCT3805SOI8的Datasheet PDF文件第5页浏览型号49FCT3805SOI8的Datasheet PDF文件第6页浏览型号49FCT3805SOI8的Datasheet PDF文件第7页 
3.3V CMOS  
BUFFER/CLOCK DRIVER  
IDT49FCT3805/A  
DESCRIPTION:  
FEATURES:  
The FCT3805 is a 3.3 volt, non-inverting clock driver built using  
advanceddualmetalCMOStechnology. Thedeviceconsistsoftwobanks  
of drivers, each with a 1:5 fanout and its own output enable control. The  
device has a "heartbeat" monitor for diagnostics and PLL driving. The  
MON output is identical to all other outputs and complies with the output  
specificationsinthisdocument. TheFCT3805offerslowcapacitanceinputs  
with hysteresis.  
• 0.5 MICRON CMOS Technology  
• Guaranteed low skew < 500ps (max.)  
• Very low duty cycle distortion < 1.0ns (max.)  
• Very low CMOS power levels  
• TTL compatible inputs and outputs  
• Inputs can be driven from 3.3V or 5V components  
• Two independent output banks with 3-state control  
• 1:5 fanout per bank  
• "Heartbeat" monitor output  
• VCC = 3.3V ± 0.3V  
TheFCT3805isdesignedforhighspeedclockdistributionwheresignal  
quality and skew are critical. The FCT3805 also allows single point-to-  
pointtransmissionlinedrivinginapplicationssuchasaddressdistribution,  
where one signal must be distributed to multiple recievers with low skew  
and high signal quality.  
• Available in SSOP, SOIC, and QSOP packages  
NOTE: EOL for non-green parts to occur on 5/13/10 per  
PDNU-09-01  
For more information on using the FCT3805 with two different input  
frequencies on bank A and B, please see AN-236.  
FUNCTIONALBLOCKDIAGRAM  
PINCONFIGURATION  
VCCA  
OA1  
OA2  
1
2
VCCB  
OB1  
20  
19  
OEA  
5
OA1 - OA5  
INA  
3
4
18  
17  
OB2  
OB3  
OA3  
GNDA  
GNDB  
OB4  
16  
15  
14  
13  
12  
11  
5
6
OA4  
OA5  
5
INB  
OB1 - OB5  
OB5  
7
OEB  
GNDQ  
OEA  
INA  
MON  
OEB  
8
9
MON  
INB  
10  
SOIC/ SSOP/ QSOP  
TOP VIEW  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE  
AUGUST 2009  
1
c
2005 Integrated Device Technology, Inc.  
DSC-3102/6  

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