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43252A04

更新时间： 2024-11-10 07:48:31
品牌 Logo 应用领域
矽成 - ICSI 时钟发生器
页数 文件大小 规格书
12页 160K
描述
FEMTOCLOCKS? CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR

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43252A04 数据手册

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PRELIMINARY  
ICS843252-04  
Integrated  
Circuit  
Systems, Inc.  
FEMTOCLOCKS™ C RYSTAL-TO-  
3.3V LVPECL CLOCK GENERATOR  
GENERAL DESCRIPTION  
FEATURES  
• Two differential 3.3V LVPECL output  
The ICS843252-04 is a 10Gb/12Gb Ethernet  
ICS  
HiPerClockS™  
Clock Generator and a member of the  
HiPerClocksTM family of high performance  
devices from ICS. The ICS843252-04 can  
synthesize 10 Gigabit Ethernet and 12 Gigabit  
• Crystal oscillator interface designed for  
18pF parallel resonant crystals  
• Crystal input frequency range: 19.33MHz - 30MHz  
• Output frequency range: 145MHz - 187.5MHz  
• VCO frequency range: 580MHz - 750MHz  
Ethernet with a 25MHz crystal. It can also generate SATA  
and 10Gb Fibre Channel reference clock frequencies with  
the appropriate choice of crystals. The ICS843252-04 has  
excellent phase jitter performance and is packaged in a  
small 16-pin TSSOP, making it ideal for use in systems with  
limited board space.  
• RMS phase jitter at 156.25MHz (1.875MHz - 20MHz):  
0.39ps (typical)  
• 3.3V operating supply  
• 0°C to 70°C ambient operating temperature  
• Industrial temperature information available upon request  
• Available in both standard and lead-free compliant  
packages  
CONFIGURATION TABLE WITH 25MHZ CRYSTAL  
Inputs  
Output Frequency  
Application  
Crystal Frequency Feedback VCO Frequency  
(MHz)  
N Output Divide  
(MHz)  
Divide  
(MHz)  
25  
30  
750  
4
4
187.5  
12 Gigabit Ethernet  
10 Gigabit Ethernet  
25  
25  
625  
156.25  
CONFIGURATION TABLE WITH SELECTABLE CRYSTALS  
Inputs  
Output Frequency  
(MHz)  
Application  
Crystal Frequency Feedback VCO Frequency  
N Output Divide  
(MHz)  
Divide  
(MHz)  
20  
30  
600  
4
4
4
4
4
150  
159.375  
150  
SATA  
21.25  
24  
30  
637.5  
600  
10 Gigabit Fibre Channel  
SATA  
25  
25.5  
30  
25  
637.5  
750  
159.375  
187.5  
10 Gigabit Fibre Channel  
12 Gigabit Ethernet  
25  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Pullup  
OE  
D
1
2
3
4
5
6
7
8
nQ1  
Q1  
VCCO  
OE  
16  
15  
14  
13  
12  
11  
10  
9
XTAL_IN  
XTAL_OUT  
VEE  
REF_CLK  
CLK_SEL  
VCC  
Q
Pulldown  
nPLL_SEL  
LE  
Pulldown  
REF_CLK  
nPLL_SEL  
VCCO  
Q0  
1
1
0
DIV. N  
÷4  
Q0  
VCCA  
FREQ_SEL  
XTAL_IN  
VCO  
nQ0  
nQ0  
Phase  
Detector  
580MHz-750MHz  
0
OSC  
Q1  
nQ1  
ICS843252-04  
16-Lead TSSOP  
4.4mm x 5.0mm x 0.92mm  
package body  
XTAL_OUT  
CLK_SEL  
Pulldown  
0 = ÷25 (default)  
G Package  
Top View  
1 = ÷30  
Pulldown  
FREQ_SEL  
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on  
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications  
without notice.  
843252AG-04  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 25, 2006  
1
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