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4259-00

更新时间: 2022-09-19 10:21:45
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PSEMI 开关射频开关光电二极管
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8页 180K
描述
SPDT High Power UltraCMOS? DC - 3.0 GHz RF Switch

4259-00 数据手册

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Product Specification  
PE4259  
SPDT High Power UltraCMOS™  
DC – 3.0 GHz RF Switch  
Product Description  
The PE4259 UltraCMOS™ RF Switch is designed to cover a  
broad range of applications from near DC through 3000 MHz.  
This reflective switch integrates on-board CMOS control logic  
with a low voltage CMOS-compatible control interface, and can  
be controlled using either single-pin or complementary control  
inputs. Using a nominal +3-volt power supply voltage, a typical  
input 1 dB compression point of +33.5 dBm can be achieved.  
Features  
Single-pin or complementary CMOS  
logic control inputs  
Low insertion loss: 0.35 dB at  
1000 MHz, 0.5 dB at 2000 MHz  
Isolation of 30 dB at 1000 MHz, 20 dB  
at 2000 MHz  
The PE4259 SPDT High Power UltraCMOS™ RF Switch is  
manufactured in Peregrine’s patented Ultra Thin Silicon  
(UTSi®) CMOS process, offering the performance of GaAs with  
the economy and integration of conventional CMOS.  
Typical input 1 dB compression point  
of +33.5 dBm  
Ultra-small SC-70 package  
Figure 1. Functional Diagram  
Figure 2. Package Type SC-70  
6-lead SC-70  
RFC  
RF1  
RF2  
CMOS  
Control  
Driver  
CTRL CTRL or VDD  
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
Operation Frequency1  
DC  
3000  
MHz  
1000 MHz  
2000 MHz  
0.35  
0.50  
0.45  
0.60  
dB  
dB  
Insertion Loss  
Isolation  
1000 MHz  
2000 MHz  
29  
19  
30  
20  
dB  
dB  
1000 MHz  
2000 MHz  
21  
24  
22  
27  
dB  
dB  
Return Loss  
‘ON’ Switching Time  
‘OFF’ Switching Time  
Video Feedthrough2  
Input 1 dB Compression  
Input IP3  
50% CTRL to 0.1 dB of final value, 1 GHz  
50% CTRL to 25 dB isolation, 1 GHz  
1.50  
1.50  
15  
us  
us  
mVpp  
dBm  
dBm  
1000 MHz  
31.5  
33.5  
55  
1000 MHz, 20dBm input power  
Notes: 1. Device linearity will begin to degrade below 10 MHz.  
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to  
High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.  
Document No. 70-0134-02 www.psemi.com  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Page 1 of 8  

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