Min.
Max.
HM
Spread Spectrum Low EMI Clock Oscillators
Thru-Hole
SMD
TTL / CMOS
3.3V
3.5MHz
220MHz
General specifications of all available packages , at Ta=+25°C , CL=15pF
Group
R
Y
P
(1) 3HM57 - R ( 7.0 * 5.0 * 1.8 mm )
( 3.5 ~ 165.0 MHz )
(1) 3HM57 - Y ( 7.0 * 5.0 * 1.8 mm )
( 8.0 ~ 165.0 MHz )
3HM57 - P ( 7.0 * 5.0 * 1.8 mm )
Model , Frequency Range
(2) 3HM53 - R ( 5.0 * 3.2 * 1.2 mm )
( 6.0 ~ 160.0 MHz )
(2) 3HM53 - Y ( 5.0 * 3.2 * 1.2 mm )
( 10.0 ~ 160.0 MHz )
( 13.0 ~ 220.0 MHz )
Total% Down Spread Center Spread
Type
Total%
1.0%
Down Spread Center Spread
Total% Down Spread
Center Spread
± 0.25% (C0.25)
Spread Type
0.5%
0.75%
1.25%
2.0%
-0.5% ( D0.5 )
-1.0% ( D1.0 )
-3.0% ( D3.0 )
-1.0% ( D1.0 )
-2.0% ( D2.0 )
-3.0% ( D3.0 )
± 0.5% (C0.5)
±1.5 % ( C1.5 )
±0.5 % ( C0.5 )
±1.0 % ( C1.0 )
±1.5 % ( C1.5 )
-0.5% ( D0.5 )
± 0.25% (C0.25)
Spread Percentage
3HM53
0.5%
-0.75% ( D0.75 ) ± 0.375% (C0.375)
-1.25% ( D1.25 ) ± 0.625% (C0.625)
3.0%
1.0%
2.0%
3.0%
Not available if Tri-state chosen
-2.0% ( D2.0 )
-3.0% ( D3.0 )
± 1.0% (C1.0)
± 1.5% (C1.5)
1.0%
3.0%
-1.0% ( D1.0 )
-3.0% ( D3.0 )
±0.5 % ( C0.5 )
±1.5 % ( C1.5 )
3HM57
3.0%
3.75%
-3.75% ( D3.75 ) ± 1.875% (C1.875)
EMI reduction (dB) = 10 Log
-7 dBc (min.) , 100MHz at C0.25
-9 dBc (min.) , 100MHz at C0.5
-9 dBc (min.) , 100MHz at C0.5
-12 dBc (min.) , 100MHz at C1.0
-15 dBc (min.) , 100MHz at C1.5
( dBc : with respect to no modulation )
12 KHz (min.) ; 42 KHz (max.)
EMI Reduction
( EMI reduction applys to
the whole spectrum. )
Modulation Carrier Frequency
( Dither rate )
-15 dBc (min.) , 100MHz at C1.5
( dBc : with respect to no modulation )
6.9 KHz (min.) ; 55.5 KHz (max.)
Frequency dependent . Call for details
Total%"x"SSC Frequency (MHz)" / 0.12
See 125MHz example on next page
25.3 KHz (min.) ; 58.6 KHz (max.)
Frequency dependent . Call for details
Frequency dependent . Call for details
Output Logic
CMOS ( Square Wave )
CMOS ( Square Wave )
CMOS ( Square Wave )
Input Voltage ( VDD
)
V
= +3.3V D.C. ±5%
V
= +3.3V D.C. ±5%
± 50 ppm
V
= +3.3V D.C. ±5%
DD
DD
DD
If non-standard , please enter the desired
stability after the " C " or " I " represents .
For example :
Frequency Stability over
± 25 ppm
± 100 ppm
Operating Temperature Range
Frequency Stability (1) Codes
( exclude modulation )
Commercial ( -10°C to +70°C )
Industrial ( -40°C to +85°C )
A
D
B
E
C
F
" C20 " ± 20ppm over -10°C to +70°C ;
" I20 " ± 20 ppm over -40°C to +85°C
2.0V (min.) ; 3.2V (typ.) [ at 90% VDD
0.8V (max.) ; 0.2V (typ.) [ at 10% VDD
4n sec. (max.) [ 10% VDD ↔ 90% VDD
15pF
]
2.0V (min.) ; 3.2V (typ.) [ at 90% VDD
0.8V (max.) ; 0.2V (typ.) [ at 10% VDD
4n sec. (max.) [ 10% VDD ↔ 90% VDD
15pF
]
2.4V (min.) ; [ at 80% VDD
]
Output Logic " High " , " 1 "
Output Logic " Low " , " 0 "
Rise Time / Fall Time
Load
]
]
0.4V (max..) ; [ at 20% VDD ]
]
]
1.3 n sec. (max.) [ 20% VDD ↔ 80% VDD
15pF
]
Start-up Time
2 m sec. (typ.) ; 5 m sec. ( max.)
2 m sec. (typ.) ; 5 m sec. ( max.)
2 m sec. (typ.) ; 5 m sec. ( max.)
10.0 ~ 50.000 MHz : 10mA (typ.)
50.0 ~ 100.0 MHz : 18mA (typ.)
100.0 ~ 160.0 MHz : 35mA (typ.)
10.0 ~ 50.000 MHz : 10mA (typ.)
Current Consumption
50.0 ~ 125.0 MHz : 27mA (typ.) , 44mA (max.)
25mA (typ.) ; Frequency dependent
50% ± 5% ( CL=15pF ; at 50% VDD
±250 ps (typ.) ; ±300 ps (max.)
)
50% ± 5% ( CL=15pF ; at 50% VDD
±100 ps (typ.) ; ±150 ps (max.)
)
50% ± 5% ( CL=15pF ; at 50% VDD
±100 ps (typ.)
)
Duty Cycle
Cycle-to-Cycle Jitter
Static Discharge Voltage
Storage Temperature
Aging
>2,000V ( per MIL-STD-883 , method 3015 )
-65°C to + 150°C
>2,000V ( per MIL-STD-883 , method 3015 )
-65°C to + 150°C
>2,000V ( per MIL-STD-883, , method 3015 )
-65°C to + 150°C
± 5 ppm per year (max.) ; Ta = +25°C
16mm tape and reel . 1000pcs per reel
± 5 ppm per year (max.) ; Ta = +25°C
16mm tape and reel . 1000pcs per reel
± 5 ppm per year (max.) ; Ta = +25°C
16mm tape and reel . 1000pcs per reel
Packaging
Tri-State enable high. Output is high impedance when taken low .
Enable / disable time: 100 ms max.
Do not make connection to this pad .
No Tri-State option available.
Pin 1 Option
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