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3HDF5761B-120T-640.000 PDF预览

3HDF5761B-120T-640.000

更新时间： 2024-11-07 05:34:59
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玛居礼 - MERCURY /
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4页 153K
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Oscillator

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3HDF5761B-120T-640.000 数据手册

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Differential LVDS Crystal Clock Oscillators LVDS Outputs  
3HDF5761 Series +3.3V, “F” family  
MERCURY  
Since 1973  
3HDF5761 products feature 0.4 ps typical phase jitter and  
low phase noise (-132 dBc at 10 KHz for 155.520 MHz).  
Differential LVDS Outputs meet the requirements for  
SONET, XDSL and other communication protocols.  
General Specifications  
Product Series  
Frequency Range  
Output Logic  
3HDF5761 ; “F” family. Tri-State on pad 1  
38 MHz ~ 640 MHz.  
Differential LVDS 100 K square wave  
Commercial “ C ”::  
-10°C to +70°C  
Industrial “ I ”:  
-40°C to +85°C  
Stability Code  
±25 ppm  
±50 ppm  
A
B
D
E
Frequency Stability  
vs Operating Temperature  
range  
±100 ppm  
Custom ±xx ppm  
C
Cxx  
F
Ixx  
If custom, use “temperature range code + desired ppm stability” for the stability  
code. Example: “C20” (±20 ppm over -10 to +70°C) or “I35”.  
38.880 MHz ≤ fout <100 MHz: 45 mA max;  
Current Consumption  
100 MHz ≤ fout <320 MHz: 60 mA max.  
320 MHz≤ fout ≤ 432 MHz: 70 mA max; (Measured with load).  
vs Supply Voltage Change  
vs Load Change  
±3 ppm max.with ±10% supply voltage change  
±2 ppm max.with ±10% Load change:  
+3.3 V ± 10 % (Voltage code is “33”)  
Supply Voltage VCC  
Supply Voltage magnitude Change (∆ VDD) -50 m V min.; +50 m V max.  
Logic High  
Logic Low  
VOH: 1.4 V typical; 1.6 V max. Condition: 100 Ω differential load.  
VOL: 0.9 V min.; 1.1 V typical. Condition: 100 Ω differential load.  
1.125 V min.; 1.20 V typical; 1.375 V max.  
Output Voltage  
Levels  
Offset Voltage (VOS)  
Offset Magnitude Change ( ∆VOS)  
Output Differential Voltage (VOD)  
Rise Time and Fall Time (Tr ; Tf)  
Duty Cycle  
0.0 mV min.; 3 mV typical; 25 mV max.  
247 mV min.; 355 mV typical; 454 mV max.  
0.7 ns typical; 1 ns max. 20% ↔ 80% of waveform; 100 ohm differential load.  
50% ± 5% max. measured at 50% waveform  
No Connection  
Differential LVDS and complimentary LVDS outputs.  
Both outputs are disabled (high impedance) when pad No. 2 is taken  
below 0.45＊Vcc referenced to ground (threshold). Oscillator is always  
ON. Only buffer stage is disabled.  
Disable current: 50 uA max. (at 0.0 V).  
Disable time: 10 ns max.  
At disabled mode, both outputs are enabled when pad No. 2 is taken  
above 0.45＊Vcc referenced to ground (threshold).  
Enable time: 10ns+one period of the output frequency max.  
Tri-state  
Function  
on pad  
No. 1  
Disable  
Enable  
SSB Phase  
Noise (dBc/Hz)  
Offset  
77.760 MHz  
155.520 MHz  
10 Hz  
-65  
-62  
100 Hz  
-96  
-92  
1 kHz  
-124  
-120  
10 kHz  
-136  
-132  
100 kHz  
-132  
-128  
1 MHz  
-145  
-144  
10 MHz  
-149  
-150  
MERCURY  
www.mercury-crystal.com  
Taiwan: TEL (886)-2-2406-2779, FAX (886)-2-2496-0769, e-mail: sales-tw@mercury-crystal.com  
U.S.A.: TEL (1)-909-466-0427, FAX (1)-909-466-0762, e-mail: sales-us@mercury-crystal.com  
MERCURY  
Page 1 of 4  
Date: April 1, 2008  
Rev. 1  
1234

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