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3D7701K-0.3 PDF预览

3D7701K-0.3

更新时间: 2024-11-19 02:50:47
品牌 Logo 应用领域
DATADELAY 振荡器延迟线
页数 文件大小 规格书
4页 222K
描述
MONOLITHIC GATED DELAY LINE OSCILLATOR

3D7701K-0.3 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.73
Base Number Matches:1

3D7701K-0.3 数据手册

 浏览型号3D7701K-0.3的Datasheet PDF文件第2页浏览型号3D7701K-0.3的Datasheet PDF文件第3页浏览型号3D7701K-0.3的Datasheet PDF文件第4页 
3D7701  
MONOLITHIC GATED  
DELAY LINE OSCILLATOR  
(SERIES 3D7701)  
FEATURES  
PACKAGES  
O1  
NC  
1
2
3
4
8
7
6
5
VDD  
All-silicon, low-power CMOS technology  
TTL/CMOS compatible inputs and outputs  
Vapor phase, IR and wave solderable  
Auto-insertable (DIP pkg.)  
NC  
O2  
EN  
O1  
NC  
NC  
NC  
NC  
VDD  
NC  
NC  
NC  
O2  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
NC  
GND  
3D7701Z-xx SOIC-8  
Frequency range: 0.3MHz through 100MHz  
Frequency tolerance: 0.5% typical  
NC  
GND  
NC  
EN  
Temperature stability: ±1.5% typical (-40C to 85C)  
Vdd stability: ±0.5% typical (4.75V to 5.25V)  
14-pin DIP available as drop-in replacements for  
hybrid delay line oscillator (DLO31F)  
8
3D7701-xx  
DIP-14  
3D7701K-xx NC pins removed  
For mechanical dimensions, click here.  
For package marking details, click here.  
FUNCTIONAL DESCRIPTION  
PIN DESCRIPTIONS  
The 3D7701 Delay Line Oscillator product family consists of fixed-  
frequency CMOS integrated circuit oscillators. Each package contains a  
single oscillator, which is gated and can therefore be synchronized to an  
external signal. The device frequency can range from 0.3MHz through  
100MHz. The 3D7701 has two outputs that are in phase when the  
oscillator is running, and can be used as a drop-in replacement for the  
EN  
O1  
O2  
Oscillator Enable  
Oscillator Output 1  
Oscillator Output 2  
VDD +5 Volts  
GND Ground  
DLO31F hybrid oscillator. The 3D7701 is TTL- and CMOS-compatible, capable of driving ten 74LS-type  
loads. It is offered in a standard 14-pin auto-insertable DIP and a space saving surface mount 8-pin SOIC  
package.  
TABLE 1: PART NUMBER SPECIFICATIONS  
DASH  
OUTPUT FREQUENCY (MHz)  
NUMBER  
25C  
-40C to 85C  
4.75<Vdd<5.25  
0.3 ± 0.008  
0.4 ± 0.010  
0.5 ± 0.013  
0.75 ± 0.019  
1.0 ± 0.025  
2.0 ± 0.050  
2.5 ± 0.063  
3.0 ± 0.075  
4.0 ± 0.100  
5.0 ± 0.125  
7.5 ± 0.188  
10.0 ± 0.25  
20.0 ± 0.50  
25.0 ± 0.63  
30.0 ± 0.75  
40.0 ± 1.00  
50.0 ± 1.25  
75.0 ± 3.75  
100.0 ± 7.00  
Vdd=5.00V  
0.3 ± 0.002  
0.4 ± 0.002  
0.5 ± 0.003  
0.75 ± 0.004  
1.0 ± 0.005  
2.0 ± 0.010  
2.5 ± 0.013  
3.0 ± 0.015  
4.0 ± 0.020  
5.0 ± 0.025  
7.5 ± 0.038  
10.0 ± 0.05  
20.0 ± 0.10  
25.0 ± 0.13  
30.0 ± 0.15  
40.0 ± 0.20  
50.0 ± 0.25  
75.0 ± 0.38  
100.0 ± 0.50  
-0.3  
-0.4  
-0.5  
-0.75  
-1  
-2  
-2.5  
-3  
-4  
-5  
-7.5  
-10  
-20  
-25  
-30  
-40  
-50  
-75  
-100  
NOTE: Any dash number between 0.3 and 100 not shown is also available as standard.  
2006 Data Delay Devices  
Doc #06023  
12/5/2006  
DATA DELAY DEVICES, INC.  
1
3 Mt. Prospect Ave. Clifton, NJ 07013  

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