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3D7622D-25 PDF预览

3D7622D-25

更新时间： 2024-11-23 03:57:51
品牌 Logo 应用领域
DATADELAY 延迟线逻辑集成电路脉冲光电二极管脉冲发生器
页数 文件大小 规格书
7页 342K
描述
22-BIT PROGRAMMABLE PULSE GENERATOR

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中文翻译

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3D7622D-25 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP,针数：14
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.71Is Samacsys：N
系列：7622JESD-30 代码：R-PDSO-G14
长度：8.695 mm逻辑集成电路类型：PULSE GENERATOR DELAY LINE
功能数量：1端子数量：14
最高工作温度：85 °C最低工作温度：-40 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
可编程延迟线：YES认证状态：Not Qualified
座面最大高度：1.82 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.9 mm
Base Number Matches：1

3D7622D-25 数据手册

 浏览型号3D7622D-25的Datasheet PDF文件第2页浏览型号3D7622D-25的Datasheet PDF文件第3页浏览型号3D7622D-25的Datasheet PDF文件第4页浏览型号3D7622D-25的Datasheet PDF文件第5页浏览型号3D7622D-25的Datasheet PDF文件第6页浏览型号3D7622D-25的Datasheet PDF文件第7页 
3D7622  
22-BIT PROGRAMMABLE PULSE  
GENERATOR  
(SERIES 3D7622 – SERIAL INTERFACE)  
FEATURES  
PACKAGE / PINOUT  
•
•
•
•
•
•
•
•
•
All-silicon, low-power CMOS technology  
TTL/CMOS compatible inputs and outputs  
Vapor phase, IR and wave solderable  
Programmable via serial interface  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
VDD  
OUT  
OUTB  
SI  
TRIG  
RES  
GND  
NC  
SC  
NC  
NC  
SO  
8
AE  
GND  
Increment range: 0.25ns through 50.0ns  
Pulse width tolerance: 1% (See Table 1)  
Supply current: 8mA typical  
3D7622D-xx SOIC  
Temperature stability: ±1.5% max (-40C to 85C)  
Vdd stability: ±0.5% max (4.75V to 5.25V)  
For mechanical dimensions, click here.  
For package marking details, click here.  
FUNCTIONAL DESCRIPTION  
PIN DESCRIPTIONS  
The 3D7622 device is a versatile 22-bit programmable monolithic  
pulse generator. A rising-edge on the trigger input (TRIG) initiates  
the pulse, which is presented on the output pins (OUT,OUTB). The  
pulse width, programmed via the serial interface, can be varied  
over 4,194,303 equal steps according to the formula:  
TRIG Trigger Input  
RES  
Reset Input  
OUT Pulse Output  
OUTB Complementary  
Pulse Output  
AE  
SC  
SI  
Address Enable Input  
tPW = tinh + addr * tinc  
Serial Clock Input  
Serial Data Input  
Serial Data Output  
where addr is the programmed address, tinc is the pulse width  
increment (equal to the device dash number), and tinh is the  
inherent (address zero) pulse width. The device also offers a reset  
input (RES), which can be used to terminate the pulse before the  
programmed time has expired.  
SO  
VDD +5 Volts  
GND Ground  
NC  
No Internal Connection  
The all-CMOS 3D7622 integrated circuit has been designed as a  
reliable, economic alternative to hybrid TTL pulse generators. It is  
offered in a standard 14-pin SOIC.  
TABLE 1: PART NUMBER SPECIFICATIONS  
Pulse Width  
Minimum  
Maximum  
PART  
Step (ns)  
P.W. (ns)  
Pulse Width  
NUMBER  
3D7622D-0.25  
3D7622D-0.4  
3D7622D-0.5  
3D7622D-1  
0.25 ± 0.12  
0.40 ± 0.20  
0.50 ± 0.25  
1.00 ± 0.50  
2.00 ± 1.00  
2.50 ± 1.25  
4.00 ± 2.00  
5.00 ± 2.50  
10.0 ± 5.00  
20.0 ± 10.0  
20.0 ± 10.0  
40.0 ± 20.0  
50.0 ± 25.0  
10.0 ± 2.0  
10.0 ± 2.0  
10.0 ± 2.0  
10.0 ± 2.0  
10.0 ± 2.0  
10.0 ± 2.0  
10.0 ± 2.0  
15.0 ± 5.0  
24.0 ± 6.0  
42.0 ± 8.0  
15.0 ± 5.0  
15.0 ± 5.0  
15.0 ± 5.0  
1.05 ms ± 10 us  
1.68 ms ± 17 us  
2.10 ms ± 21 us  
4.19 ms ± 42 us  
8.39 ms ± 84 us  
10.5 ms ± 105 us  
16.8 ms ± 170 us  
21.0 ms ± 210 us  
41.9 ms ± 420 us  
83.9 ms ± 840 us  
105 ms ± 1.0 ms  
168 ms ± 1.7 ms  
210 ms ± 2.1 ms  
3D7622D-2  
3D7622D-2.5  
3D7622D-4  
3D7622D-5  
3D7622D-10  
3D7622D-20  
3D7622D-25 *  
3D7622D-40 *  
3D7622D-50 *  
NOTES: Any increment between 0.25 and 50 ns not shown is also available as a standard device.  
* Some restrictions apply to dash numbers greater than 20. See application notes for more details.  
2006 Data Delay Devices  
Doc #06007  
5/8/2006  
DATA DELAY DEVICES, INC.  
1
3 Mt. Prospect Ave. Clifton, NJ 07013  
1234567

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