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3D3523D-20 PDF预览

3D3523D-20

更新时间: 2024-01-05 03:07:25
品牌 Logo 应用领域
DATADELAY 编码器电信光电二极管电信集成电路
页数 文件大小 规格书
5页 312K
描述
Manchester Encoder/Decoder, CMOS, PDSO14, 0.150 INCH, ROHS COMPLIANT, SOIC-14

3D3523D-20 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.84JESD-30 代码:R-PDSO-G14
长度:8.695 mm功能数量:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.82 mm
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:MANCHESTER ENCODER/DECODER
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm

3D3523D-20 数据手册

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3D3523  
MONOLITHIC MANCHESTER  
ENCODER/DECODER  
(SERIES 3D3523)  
ta  
FEATURES  
PACKAGES  
All-silicon, low-power CMOS technology  
Encoder and decoder function independently  
Encoder has buffered clock output  
3.3V operation  
CIN  
CEN  
RX  
COUT  
DIN  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
VDD  
CBUF  
LOOP  
TXENB  
DOUTB  
TXB  
Vapor phase, IR and wave solderable  
Low ground bounce noise  
RESB  
GND  
8
TX  
Maximum data rate: 50 MBaud  
Data rate range: ±15%  
3D3523D-xxx SOIC (.150)  
Lock-in time: 1 bit  
For mechanical dimensions, click here.  
For package marking details, click here.  
FUNCTIONAL DESCRIPTION  
PIN DESCRIPTIONS  
Encoder:  
The 3D3523 is a monolithic CMOS Manchester Encoder/Decoder combo  
chip. The device uses bi-phase-level encoding to embed a clock signal  
into a data stream for transmission across a communications link. In this  
encoding mode, a logic one is represented by a high-to-low transition in  
the center of the bit cell, while a logic zero is represented by a low-to-high  
transition.  
CIN  
DIN  
Clock Input  
Data Input  
RESB Reset  
CEN  
Clock buffer enable  
TXENB Transmit enable  
CBUF Buffered clock  
TX,TXB Transmitted signal  
The Manchester encoder combines the clock (CIN) and data (DIN) into a  
single bi-phase-level signal (TX). An inverted version of this signal (TXB) is  
also available. The data baud rate (in MBaud) is equal to the input clock  
frequency (in MHz). A replica of the clock input is also available (CBUF).  
Decoder:  
RX  
Received Signal  
COUT Recovered Clock  
DOUTB Recovered Data  
The encoder may be reset by setting the RESB input low; otherwise, it  
should be left high. The TX and TXB signals may be disabled (high-Z) by  
setting TXENB high. Similarly, CBUF may be disabled by setting CEN low.  
Under most operating conditions, TX and TXB are always enabled, and  
CBUF is not used. With this in mind, the 3D3523 provides internal pull-  
down resistors on CEN and TXENB, so that most users can leave these  
inputs uncommitted.  
Common:  
LOOP Loop enable  
VDD  
GND  
+3.3 Volts  
Ground  
The Manchester decoder accepts the embedded-clock signal at the RX input. The recovered clock and  
data signals are presented on COUT and DOUTB, respectively, with the data signal inverted. The  
operating baud rate (in MBaud) is specified by the dash number of the device. The input baud rate may  
vary by as much as ±15% from the nominal device baud rate without compromising the integrity of the  
information received.  
Because the decoder is not PLL-based, it does not require a long preamble in order to lock onto the  
received signal. Rather, the device requires at most one bit cell before the data presented at the output is  
valid. This is extremely useful in cases where the information arrives in bursts and the input is otherwise  
turned off.  
Normally, the encoder and decoder function independently. However, if the LOOP input is set high, the  
encoded TX signal is fed back internally into the decoder and the RX input is ignored. This feature is  
useful for diagnostics. The LOOP input has an internal pull-down resistor and may be left uncommitted if  
this feature is not needed.  
2007 Data Delay Devices  
Doc #06006  
10/31/2007  
DATA DELAY DEVICES, INC.  
1
3 Mt. Prospect Ave. Clifton, NJ 07013  

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