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2PG001 PDF预览

2PG001

更新时间: 2024-11-21 20:10:31
品牌 Logo 应用领域
松下 - PANASONIC 局域网功率控制晶体管
页数 文件大小 规格书
3页 292K
描述
Insulated Gate Bipolar Transistor, 30A I(C), 300V V(BR)CES, N-Channel, TO-220AB, TO-220F, 3 PIN

2PG001 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TO-220AB
包装说明:TO-220F, 3 PIN针数:3
Reach Compliance Code:unknownHTS代码:8541.29.00.95
风险等级:5.83外壳连接:ISOLATED
最大集电极电流 (IC):30 A集电极-发射极最大电压:300 V
配置:SINGLE门极发射器阈值电压最大值:5.5 V
门极-发射极最大电压:30 VJEDEC-95代码:TO-220AB
JESD-30 代码:R-PSFM-T3湿度敏感等级:1
元件数量:1端子数量:3
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):40 W认证状态:Not Qualified
子类别:Insulated Gate BIP Transistors表面贴装:NO
端子面层:Tin/Silver/Bismuth/Copper (Sn/Ag/Bi/Cu)端子形式:THROUGH-HOLE
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:POWER CONTROL晶体管元件材料:SILICON
标称断开时间 (toff):270 ns标称接通时间 (ton):487 ns
Base Number Matches:1

2PG001 数据手册

 浏览型号2PG001的Datasheet PDF文件第2页浏览型号2PG001的Datasheet PDF文件第3页 
This product complies with the RoHS Directive (EU 2002/95/EC).  
IGBT  
2PG001  
N-channel enhancement mode IGBT  
For plasma display panel drive  
For high speed switching circuits  
Package  
Features  
Code  
Low collector-emitter saturation voltage: VCE(sat) <2.5 V  
High speed hall time: tf = 250 nsec(typ.)  
TO-220F-A1  
Marking mbol: 2PG001  
Absolute Maximum Ratings TC = 25°C  
Pin N
1. Gate  
Parameter  
Collector-emitter voltage (E-B short)  
Gate-emitter voltage (E-B short)  
Collector current  
Symbol  
VCES  
VGES  
IC  
Rating  
300  
nit  
V
llector  
. Emier  
V
±3
A
Internal Connection  
Peak collector current *  
IP  
120  
A
C
E
40  
W
W
C  
°C  
G
Power dissipation  
PC  
Tj  
T = 25°
20  
Junction temperature  
Storage temperature  
150  
T
stg  
55 to +50  
Note) : PW 10 us, Duty 1.0%  
*
ElctricaCheristics TC 25°C±3°
meter  
Collecto-emittr voltage (E-short)  
ollector-mitter cutoff cuent (E-B short)  
Gateemitter (E-B short)  
Gate-emitter ge  
Collector-emitter n voltage  
Short-circuit input capacitance (Common emitter)  
Short-circuit output capacitance (Common emitter)  
Reverse transfer capacitance (Common emitter)  
Gate charge load  
Symbol  
Conditions  
Min  
Typ  
Max  
Unit  
V
VCES  
ICES  
IGES  
IC = 1 mA, VGE = 0  
VCE = 240 V, VGE = 0  
VGE = ±30 V, VCE = 0  
300  
50  
±1.0  
5.5  
mA  
mA  
V
VGE(th) VCE = 10 V, IC = 1.0 mA  
VCE(sat) VGE = 15 V, IC = 30A  
Cies  
3.0  
2.0  
580  
86  
2.5  
V
pF  
pF  
pF  
nC  
nC  
nC  
ns  
Coes  
Cres  
Qg  
VCE = 25 V, VGE = 0, f = 1 MHz  
14  
25  
Gate-emitter charge  
Qge  
Qgc  
td(on)  
tr  
VCC = 150 V, IC = 30A, VGE = 15 V  
5
Gate-collector charge  
10  
Turn-on delay time  
87  
Rise time  
400  
120  
150  
ns  
VCC = 150 V, IC = 30A,  
RL 5 , VGE = 15 V  
Turn-off delay time  
td(off)  
tf  
ns  
Fall time  
ns  
Note) Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.  
Publication date : June 2007  
SJN00003AED  
1

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