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2N6402 PDF预览

2N6402

更新时间: 2024-09-12 22:29:19
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发装置可控硅整流器局域网
页数 文件大小 规格书
8页 78K
描述
Silicon Controlled Rectifiers Reverse Blocking Thyristors

2N6402 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TO-220AB包装说明:FLANGE MOUNT, R-PSFM-T3
针数:3Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8541.30.00.80
风险等级:5.09Is Samacsys:N
外壳连接:ANODE配置:SINGLE
最大直流栅极触发电流:30 mA最大直流栅极触发电压:2.5 V
最大维持电流:60 mAJEDEC-95代码:TO-220AB
JESD-30 代码:R-PSFM-T3JESD-609代码:e0
最大漏电流:2 mA通态非重复峰值电流:160 A
元件数量:1端子数量:3
最大通态电流:5000 A最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
峰值回流温度(摄氏度):240认证状态:Not Qualified
最大均方根通态电流:16 A断态重复峰值电压:200 V
重复峰值反向电压:200 V子类别:Silicon Controlled Rectifiers
表面贴装:NO端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子位置:SINGLE
处于峰值回流温度下的最长时间:30触发设备类型:SCR
Base Number Matches:1

2N6402 数据手册

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2N6400 Series  
Preferred Device  
Silicon Controlled Rectifiers  
Reverse Blocking Thyristors  
Designed primarily for half-wave ac control applications, such as  
motor controls, heating controls and power supplies; or wherever  
half–wave silicon gate–controlled, solid–state devices are needed.  
Glass Passivated Junctions with Center Gate Geometry for Greater  
Parameter Uniformity and Stability  
http://onsemi.com  
SCRs  
16 AMPERES RMS  
50 thru 800 VOLTS  
Small, Rugged, Thermowatt Construction for Low Thermal  
Resistance, High Heat Dissipation and Durability  
Blocking Voltage to 800 Volts  
Device Marking: Logo, Device Type, e.g., 2N6400, Date Code  
G
A
K
*MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
Peak Repetitive Off–State Voltage (Note 1.)  
V
V
RRM  
Volts  
DRM,  
MARKING  
DIAGRAM  
(T = *40 to 125°C, Sine Wave  
J
50 to 60 Hz; Gate Open)  
2N6400  
50  
2N6401  
2N6402  
2N6403  
2N6404  
100  
200  
400  
600  
800  
4
TO–220AB  
CASE 221A  
STYLE 3  
YY WW  
640x  
2N6405  
On-State RMS Current  
(180° Conduction Angles; T = 100°C)  
I
16  
A
A
A
T(RMS)  
1
C
2
x
= 0, 1, 2, 3, 4 or 5  
Average On-State Current  
(180° Conduction Angles; T = 100°C)  
I
T(AV)  
10  
3
YY = Year  
C
WW = Work Week  
Peak Non-repetitive Surge Current  
I
160  
TSM  
(1/2 Cycle, Sine Wave 60 Hz, T = 90°C)  
PIN ASSIGNMENT  
Cathode  
J
2
2
1
2
3
4
Circuit Fusing (t = 8.3 ms)  
Forward Peak Gate Power  
I t  
145  
20  
A s  
Anode  
P
Watts  
Watts  
A
GM  
(Pulse Width 1.0 µs, T = 100°C)  
Gate  
C
Anode  
Forward Average Gate Power  
P
0.5  
2.0  
G(AV)  
(t = 8.3 ms, T = 100°C)  
C
Forward Peak Gate Current  
I
GM  
ORDERING INFORMATION  
(Pulse Width 1.0 µs, T = 100°C)  
C
Operating Junction Temperature Range  
T
–40 to  
+125  
°C  
Device  
Package  
TO220AB  
TO220AB  
TO220AB  
Shipping  
500/Box  
500/Box  
500/Box  
J
2N6400  
2N6401  
2N6402  
Storage Temperature Range  
T
stg  
–40 to  
+150  
°C  
*Indicates JEDEC Registered Data.  
1. V  
and V  
for all types can be applied on a continuous basis. Ratings  
DRM  
RRM  
2N6403  
2N6404  
2N6405  
TO220AB  
TO220AB  
TO220AB  
500/Box  
500/Box  
500/Box  
apply for zero or negative gate voltage; however, positive gate voltage shall  
not be applied concurrent with negative potential on the anode. Blocking  
voltages shall not be tested with a constant current source such that the  
voltage ratings of the devices are exceeded.  
Preferred devices are recommended choices for future use  
and best overall value.  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
April, 2001 – Rev. 2  
2N6400/D  

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