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2N6071B-VA PDF预览

2N6071B-VA

更新时间: 2024-10-30 13:04:03
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极触发装置可控硅三端双向交流开关局域网
页数 文件大小 规格书
6页 121K
描述
200V, 4A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-225AA

2N6071B-VA 技术参数

生命周期:Obsolete包装说明:FLANGE MOUNT, R-PSFM-T3
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8541.30.00.80风险等级:5.63
Is Samacsys:N其他特性:SENSITIVE GATE
外壳连接:MAIN TERMINAL 2配置:SINGLE
最大直流栅极触发电流:3 mA最大直流栅极触发电压:2.5 V
最大维持电流:15 mAJEDEC-95代码:TO-225AA
JESD-30 代码:R-PSFM-T3元件数量:1
端子数量:3最高工作温度:110 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
认证状态:Not Qualified最大均方根通态电流:4 A
重复峰值关态漏电流最大值:10 µA断态重复峰值电压:200 V
表面贴装:NO端子形式:THROUGH-HOLE
端子位置:SINGLE触发设备类型:4 QUADRANT LOGIC LEVEL TRIAC
Base Number Matches:1

2N6071B-VA 数据手册

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Order this document  
by 2N6071/D  
SEMICONDUCTOR TECHNICAL DATA  
Silicon Bidirectional Thyristors  
*Motorola preferred devices  
. . . designed primarily for full-wave ac control applications, such as light dimmers,  
motor controls, heating controls and power supplies; or wherever full-wave silicon  
gate controlled solid-state devices are needed. Triac type thyristors switch from a  
blocking to a conducting state for either polarity of applied anode voltage with positive  
or negative gate triggering.  
TRIACs  
4 AMPERES RMS  
200 thru 600 VOLTS  
Sensitive Gate Triggering Uniquely Compatible for Direct Coupling to TTL, HTL,  
CMOS and Operational Amplifier Integrated Circuit Logic Functions  
Gate Triggering 4 Mode — 2N6071A,B, 2N6073A,B, 2N6075A,B  
Blocking Voltages to 600 Volts  
All Diffused and Glass Passivated Junctions for Greater Parameter Uniformity  
and Stability  
MT1  
MT2  
G
Small, Rugged, Thermopad Construction for Low Thermal Resistance, High Heat  
Dissipation and Durability  
MT2  
CASE 77-08  
(TO-225AA)  
STYLE 5  
G
MT2  
MT1  
MAXIMUM RATINGS (T = 25°C unless otherwise noted.)  
J
Rating  
Symbol  
Value  
Unit  
(1)  
*Peak Repetitive Off-State Voltage  
V
DRM  
Volts  
(Gate Open, T = 25 to 110°C)  
2N6071A,B  
2N6073A,B  
2N6075A,B  
200  
400  
600  
J
*On-State Current RMS (T = 85°C)  
I
4
Amps  
Amps  
C
T(RMS)  
*Peak Surge Current  
I
30  
TSM  
(One Full cycle, 60 Hz, T = –40 to +110°C)  
J
2
I t  
2
A s  
Circuit Fusing Considerations  
(t = 8.3 ms)  
3.7  
*Peak Gate Power  
P
10  
0.5  
5
Watts  
Watt  
GM  
*Average Gate Power  
P
G(AV)  
*Peak Gate Voltage  
V
GM  
Volts  
*Indicates JEDEC Registered Data.  
1. V  
for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the  
DRM  
voltage ratings of the devices are exceeded.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
REV 1  
Motorola, Inc. 1998  

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