2N5551BU-C

更新时间： 2024-02-09 05:44:22

品牌	Logo	应用领域
安森美 - ONSEMI		晶体放大器晶体管
页数	文件大小	规格书
6页	75K
描述
Small Signal Bipolar Transistor

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技术参数
数据手册

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2N5551BU-C 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	CYLINDRICAL, O-PBCY-T3	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8541.21.00.95
风险等级：	7.99	最大集电极电流 (IC)：	0.6 A
集电极-发射极最大电压：	160 V	配置：	SINGLE
最小直流电流增益 (hFE)：	30	JEDEC-95代码：	TO-92
JESD-30 代码：	O-PBCY-T3	JESD-609代码：	e3
元件数量：	1	端子数量：	3
最高工作温度：	150 °C	封装主体材料：	PLASTIC/EPOXY
封装形状：	ROUND	封装形式：	CYLINDRICAL
极性/信道类型：	NPN	最大功率耗散 (Abs)：	0.625 W
认证状态：	Not Qualified	子类别：	Other Transistors
表面贴装：	NO	端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE	端子位置：	BOTTOM
晶体管应用：	AMPLIFIER	晶体管元件材料：	SILICON
标称过渡频率 (fT)：	100 MHz	Base Number Matches：	1

2N5551BU-C 数据手册

2N5550, 2N5551

Preferred Device

Amplifier Transistors

NPN Silicon

Features

• Pb−Free Packages are Available*

http://onsemi.com

• Device Marking: Device Type, e.g., 2N5550, Date Code

COLLECTOR

BASE

MAXIMUM RATINGS

Rating

Symbol 2N5550 2N5551

Unit

Vdc

EMITTER

Collector − Emitter Voltage

Collector − Base Voltage

Emitter − Base Voltage

Collector Current − Continuous

Total Device Dissipation

CEO

CBO

140

160

180

Vdc

EBO

6.0

Vdc

MARKING

DIAGRAM

600

mAdc

@ T = 25°C

Derate above 25°C

625

5.0

mW/°C

55xx

YWW

TO−92

CASE 29

STYLE 1

Total Device Dissipation

@ T = 25°C

Derate above 25°C

1.5

mW/°C

Operating and Storage Junction

Temperature Range

T , T

−55 to +150

°C

stg

55xx

Specific Device Code

= Year

= Work Week

Maximumratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits

are exceeded, device functional operation is not implied, damage may occur

and reliability may be affected.

ORDERING INFORMATION

THERMAL CHARACTERISTICS

See detailed ordering and shipping information in the package

dimensions section on page 3 of this data sheet.

Characteristic

Symbol

Max

Unit

Thermal Resistance,

Junction−to−Ambient

200

°C/W

Preferred devices are recommended choices for future use

and best overall value.

Thermal Resistance,

Junction−to−Case

83.3

°C/W

*For additional information on our Pb−Free strategy and soldering details, please

downloadthe ON Semiconductor Soldering and Mounting Techniques Reference

Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2004

Publication Order Number:

June, 2004 − Rev. 3

2N5550/D

12 3 4 5 6

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