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2N5064 PDF预览

2N5064

更新时间: 2024-11-11 22:45:03
品牌 Logo 应用领域
恩智浦 - NXP 栅极
页数 文件大小 规格书
4页 21K
描述
Thyristor sensitive gate

2N5064 数据手册

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Philips Semiconductors  
Product specification  
Thyristor  
sensitive gate  
2N5064  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
Glass passivated sensitive gate  
SYMBOL PARAMETER  
MAX. UNIT  
thyristor in  
a
plastic envelope,  
intended for use in general purpose  
switching and phase control  
applications. This device is intended  
to be interfaced directly to  
microcontrollers, logic integreated  
circuits and other low power gate  
trigger circuits.  
VDRM  
VRRM  
IT(AV)  
,
Repetitive peak off-state voltages  
200  
V
Average on-state current  
RMS on-state current  
0.5  
0.8  
10  
A
A
A
IT(RMS)  
ITSM  
Non-repetitive peak on-state current  
PINNING - TO92 variant  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
anode  
a
k
2
gate  
3
cathode  
g
3
2 1  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134).  
SYMBOL PARAMETER  
CONDITIONS  
MIN. MAX. UNIT  
VDRM, VRRM Repetitive peak off-state  
voltages  
-
200  
V
IT(AV)  
Average on-state current half sine wave  
Tc 67 ˚C  
-
-
-
-
0.51  
0.255  
0.8  
A
A
A
A
Tc 102 ˚C  
all conduction angles  
IT(RMS)  
ITRM  
RMS on-state current  
Repetitive peak on-state  
current  
8
ITSM  
Non-repetitive peak  
on-state current  
half sine wave; Ta = 25 ˚C prior to surge;  
-
10  
A
t = 8.3 ms  
t = 8.3 ms  
I2t  
IGM  
I2t for fusing  
-
0.4  
1
5
5
0.1  
0.01  
150  
125  
A2s  
A
V
V
W
W
˚C  
˚C  
Peak gate current  
Peak gate voltage  
Peak reverse gate voltage  
Peak gate power  
Average gate power  
Storage temperature  
Operating junction  
temperature  
Ta = 25˚C, tp = 300µs; f = 120 Hz  
-
VGM  
VRGM  
PGM  
PG(AV)  
Tstg  
Tj  
-
-
Ta = 25˚C  
Ta = 25˚C, over any 16 ms period  
-
-
-65  
-65  
October 1997  
1
Rev 1.200  

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