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29F52PCQR PDF预览

29F52PCQR

更新时间: 2024-11-09 13:01:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 72K
描述
Registered Bus Transceiver, F/FAST Series, 1-Func, 8-Bit, True Output, TTL, PDIP24, PLASTIC, DIP-24

29F52PCQR 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:24
Reach Compliance Code:unknown风险等级:5.63
Is Samacsys:N其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列:F/FASTJESD-30 代码:R-PDIP-T24
长度:31.75 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):10 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:15.24 mmBase Number Matches:1

29F52PCQR 数据手册

 浏览型号29F52PCQR的Datasheet PDF文件第2页浏览型号29F52PCQR的Datasheet PDF文件第3页浏览型号29F52PCQR的Datasheet PDF文件第4页浏览型号29F52PCQR的Datasheet PDF文件第5页浏览型号29F52PCQR的Datasheet PDF文件第6页浏览型号29F52PCQR的Datasheet PDF文件第7页 
April 1988  
Revised August 1999  
29F52•29F53  
8-Bit Registered Transceiver  
General Description  
Features  
The 29F52 and 29F53 are 8-bit registered transceivers.  
Two 8-bit back to back registers store data flowing in both  
directions between two bidirectional buses. Separate clock,  
clock enable and 3-STATE output enable signals are pro-  
vided for each register. The A0–A7 output pins are guaran-  
8-bit registered transceivers  
Separate clock, clock enable and 3-STATE output  
enable provided for each register  
AMD Am2952/2953 functional equivalents  
Both inverting and non-inverting options available  
24-Pin slimline package  
teed to sink 24 mA while the B0–B7 output pins are  
designed for 64 mA.  
The 29F53 is an inverting option of the 29F52. Both trans-  
ceivers are AMD Am2952/2953 functional equivalents.  
Ordering Code:  
Order Number Package Number  
Package Description  
29F52SC  
M24B  
N24C  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide  
29F52SPC  
29F53SPC  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
29F52  
29F53  
IEEE/IEC  
29F53  
IEEE/IEC  
29F52  
© 1999 Fairchild Semiconductor Corporation  
DS009606  
www.fairchildsemi.com  

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