Datasheet > 29F400T-90PI

29F400T-90PI

更新时间： 2024-02-25 01:37:18

品牌	Logo	应用领域
华邦 - WINBOND		光电二极管内存集成电路
页数	文件大小	规格书
38页	227K
描述
Flash, 512KX8, 90ns, PDSO44, PLASTIC, SOP-44

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29F400T-90PI 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	PLASTIC, SOP-44	针数：	44
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	风险等级：	5.47
最长访问时间：	90 ns	备用内存宽度：	16
启动块：	TOP	JESD-30 代码：	R-PDSO-G44
长度：	28.2 mm	内存密度：	4194304 bit
内存集成电路类型：	FLASH	内存宽度：	8
功能数量：	1	端子数量：	44
字数：	524288 words	字数代码：	512000
工作模式：	ASYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	512KX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
并行/串行：	PARALLEL	编程电压：	5 V
认证状态：	Not Qualified	座面最大高度：	2.8 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	类型：	NOR TYPE
宽度：	13.3 mm	最长写入周期时间 (tWC)：	0.09 ms
Base Number Matches：	1

29F400T-90PI 数据手册

BRIGHT

Microelectronics

Inc.

Preliminary BM29F400T/BM29F400B

4MEGABIT (512K x 8/ 256K x 16)

5VOLT SECTOR ERASE CMOS FLASH MEMORY

GENERAL DESCRIPTION

The BM29F400 is an 4 Megabit, 5.0 volt-only CMOS Flash memory device organized as a 512

Kbytes of 8-bits each, or 256 Kbytes of 16 bits each. The device is offered in standard 44-pin SOP

and 48-pin TSOP packages. It is designed to be programmed and erased in-system with a 5.0 volt

power-supply and can also be reprogrammed in standard EPROM programmers.

With access times of 90 nS, 120 nS, and 150 nS, the BM29F400 has separate chip enable CE, write

enable WE , and output enable OE controls. BMI's memory devices reliably store memory data even

after 100,000 program and erase cycles.

The BM29F400 is entirely pin and command set compatible with the JEDEC standard for 4 Megabit

Flash memory devices. Commands are written to the command register using standard

microprocessor write timings. Register contents serve as input to an internal state-machine which

controls the erase and programming circuitry. Write cycles also internally latch addresses and data

needed for the programming and erase operations.

The BM29F400 is programmed by executing the program command sequence. This will start the

internal byte/word programming algorithm that automatically times the program pulse width and also

verifies the proper cell margin. Erase is accomplished by executing either the sector erase or chip

erase command sequence. This will start the internal erasing algorithm that automatically times the

erase pulse width and also verifies the proper cell margin. No preprogramming is required prior to

execution of the internal erase algorithm. Sectors of the BM29F400 Flash memory array are

electrically erased via Fowler-Nordheim tunneling. Bytes/words are programmed one byte/word at a

time using a hot electron injection mechanism.

The BM29F400 features a sector erase architecture. The device memory array is divided into one 16

Kbytes, two 8 Kbytes, one 32 Kbytes, and seven 64 Kbytes. Sectors can be erased individually or in

groups without affecting the data in other sectors. Multiple sector erase and full chip erase capabilities

add flexibility to altering the data in the device. To protect this data from accidental program and

erase, the device also has a sector protect function. This function hardware write protects the

selected sector(s). The sector protect and sector unprotect features can be enabled in a PROM

programmer.

For read, program and erase operation, the BM29F400 needs a single 5.0 volt power-supply.

Internally generated and well regulated voltages are provided for the program and erase operation. A

low Vcc detector inhibits write operations on loss of power. End of program or erase is detected by the

Ready/Busy status pin, Data Polling of DQ7, or by the Toggle Bit I feature on DQ6. Once the program

or erase cycle has been successfully completed, the device internally resets to the Read mode.

The BM29F400 also has a hardware RESET pin. Driving the RESET pin low during execution of an

Internal Programming or Erase command will terminate the operation and reset the device to the

Read mode. The RESET pin may be tied to the system reset circuitry, so that the system will have

access to boot code upon completion of system reset, even if the Flash device is in the process of an

Internal Programming or Erase operation. If the device is reset using the RESET pin during an

Internal Programming or Erase operation, data in the address locations on which the internal state

A Winbond Company

Publication Release Date: May 1999

Revision A1

- 1 -

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与29F400T-90PI相关器件

型号	品牌	描述	获取价格	数据表
29F400T-90TC	ETC	4MEGABIT (512K x 8/ 256K x 16) 5VOLT SECTOR ERASE CMOS FLASH MEMORY	获取价格
29F400T-90TI	WINBOND	Flash, 512KX8, 90ns, PDSO48, TSOP-48	获取价格
29F52	FAIRCHILD	8-Bit Registered Transceiver	获取价格
29F524DC	TI	8-BIT, DSP-PIPELINE REGISTER, CDIP28, CERAMIC, DIP-28	获取价格
29F524DCQR	TI	8-BIT, DSP-PIPELINE REGISTER, CDIP28, CERAMIC, DIP-28	获取价格
29F524DM	TI	8-BIT, DSP-PIPELINE REGISTER, CDIP28, CERAMIC, DIP-28	获取价格

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