Datasheet > 存储 > EEPROM> 28C64AFT-15L

28C64AFT-15L

更新时间： 2024-11-12 22:05:27

品牌	Logo	应用领域
美国微芯 - MICROCHIP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
8页	71K
描述
64K (8K x 8) CMOS EEPROM

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中文翻译

获取价格

数据手册

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28C64AFT-15L 数据手册

28C64A

64K (8K x 8) CMOS EEPROM

FEATURES

PACKAGE TYPES

• Fast Read Access Time—150 ns

• CMOS Technology for Low Power Dissipation

- 30 mA Active

RDY/BSY

A12

• 1

28 Vcc

27 WE

26 NC

25 A8

A1 10

A0 11

NC 12

I/O0 13

29 A8

28 A9

24 A9

- 100 µA Standby

23 A11

22 OE

21 A10

20 CE

19 I/O7

18 I/O6

17 I/O5

16 I/O4

15 I/O3

27 A11

26 NC

25 OE

24 A10

23 CE

22 I/O7

21 I/O6

• Fast Byte Write Time—200 µs or 1 ms

• Data Retention >200 years

• High Endurance - Minimum 100,000 Erase/Write

Cycles

• Automatic Write Operation

- Internal Control Timer

I/O0

I/O1

I/O2

V_SS14

- Auto-Clear Before Write Operation

- On-Chip Address and Data Latches

• Data Polling

• Ready/Busy

• Chip Clear Operation

• Pin 1 indicator on PLCC on top of package

A11

A10

27 CE

26 I/07

25 I/06

24 I/05

23 I/04

22 I/03

Vcc

• Enhanced Data Protection

- VCC Detector

- Pulse Filter

- Write Inhibit

RDY/BSY

A12

Vss

20 I/02

19 I/01

18 I/00

17 A0

16 A1

15 A2

A7 10

A6 11

A5 12

A4 13

A3 14

• Electronic Signature for Device Identiﬁcation

• 5-Volt-Only Operation

• Organized 8Kx8 JEDEC Standard Pinout

- 28-pin Dual-In-Line Package

- 32-pin PLCC Package

- 28-pin Thin Small Outline Package (TSOP)

8x20mm

- 28-pin Very Small Outline Package (VSOP)

8x13.4mm

A11

A10

I/O7

I/O6

I/O5

I/O4

I/O3

VCC

RDY/BSY

A12

I/O2

I/O1

I/O0

• Available for Extended Temperature Ranges:

- Commercial: 0˚C to +70˚C

DESCRIPTION

BLOCK DIAGRAM

The Microchip Technology Inc. 28C64A is a CMOS 64K non-

volatile electrically Erasable PROM. The 28C64A is

accessed like a static RAM for the read or write cycles without

the need of external components. During a “byte write”, the

address and data are latched internally, freeing the micropro-

cessor address and data bus for other operations. Following

the initiation of write cycle, the device will go to a busy state

and automatically clear and write the latched data using an

internal control timer. To determine when the write cycle is

complete, the user has a choice of monitoring the Ready/

Busy output or using Data polling. The Ready/Busy pin is an

open drain output, which allows easy conﬁguration in wired-

or systems. Alternatively, Data polling allows the user to read

the location last written to when the write operation is com-

plete. CMOS design and processing enables this part to be

used in systems where reduced power consumption and reli-

ability are required. A complete family of packages is offered

to provide the utmost ﬂexibility in applications

I/O0

I/O7

VSS

Data Protection

VCC

Circuitry

Chip Enable/

Output Enable

Control Logic

Input/Output

Buffers

Auto Erase/Write

Timing

Data

Poll

Rdy/

Busy

Program Voltage

Generation

Y Gating

Decoder

16K bit

Cell Matrix

Decoder

A12

1996 Microchip Technology Inc.

DS11109H-page 1

This document was created with FrameMaker 4 0 4

12 3 4 5 6 7 8

中文翻译

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与28C64AFT-15L相关器件

型号	品牌	获取价格	描述	数据表
28C64AFT-15P	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-15SO	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-15TS	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-15VS	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-20/L	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-20/P	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-20/SO	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-20/TS	MICROCHIP	获取价格	8K X 8 EEPROM 5V, 200 ns, PDSO28, 8 X 20 MM, TSOP-28
28C64AFT-20I/L	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64AFT-20I/P	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM

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