Datasheet > 24LC320-ISN

24LC320-ISN

更新时间： 2022-11-28 20:37:17

品牌	Logo	应用领域
美国微芯 - MICROCHIP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
12页	90K
描述
32K 2.5V SPI Bus Serial EEPROM

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24LC320-ISN 数据手册

25LC320

32K 2.5V SPI Bus Serial EEPROM

FEATURES

PACKAGE TYPES

DIP/SOIC

• SPI modes 0,0 and 1,1

• 3.0 MHz Clock Rate

• Single supply with Programming Operation down

to 2.5V

• Low Power CMOS Technology

- Max Write Current: 5.0 mA

- Read Current: 1 mA at 5.5V, 3 Mhz

- Standby Current: 1 µA typical

• 4096 x 8 Organization

VCC

HOLD

VSS

SCK

• 32-Byte Page

• Sequential Read

• Self-timed ERASE and WRITE Cycles

• Block Write Protection

- Protect none, 1/4, 1/2, or all of Array

• Built-in Write Protection

TSSOP

CS 1

SO 2

NC 3

NC 4

NC 5

WP 6

VSS7

14 VCC

13 HOLD

12 NC

11 NC

10 NC

9 SCK

8 SI

- Power On/Off Data Protection Circuitry

- Write Enable Latch

- Write Protect Pin

• High Reliability

BLOCK DIAGRAM

- Endurance: 1M cycles (guaranteed)

- Data Retention: >200 years

- ESD protection: >4000V

• 8-pin PDIP/SOIC, 14-pin TSSOP

• Temperature ranges supported

Status

HV Generator

- Commercial (C):

- Industrial (I):

0°C to +70°C

-40°C to +85°C

EEPROM

Array

Memory

Control

Logic

I/O Control

Logic

DESCRIPTION

Dec

The Microchip Technology Inc. 25LC320 is a 32K-bit

serial Electrically Erasable PROM (EEPROM). The

memory is accessed via a simple Serial Peripheral

Interface (SPI) compatible serial bus. The bus signals

required are a clock input (SCK) plus separate data in

(SI) and data out (SO) lines. Access to the device is

controlled through a chip select (CS) input, allowing any

number of devices to share the same bus.

Page Latches

Y Decoder

SCK

HOLD

Sense Amp.

R/W Control

There are two other inputs that provide the end user

with additional ﬂexibility. Communication to the device

can be paused via the hold pin (HOLD). While the

device is paused, transitions on its inputs will be

ignored, with exception of chip select, allowing the host

to service higher priority interrupts. Also write opera-

tions to the Status Register can be disabled via the

write protect pin (WP).

Vcc

Vss

SPI is a trademark of Motorola.

1996 Microchip Technology Inc.

Preliminary

DS21158B-page 1

This document was created with FrameMaker 4 0 4

12 3 4 5 6 7...12

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