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24LC21A PDF预览

24LC21A

更新时间: 2024-11-17 22:38:27
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
16页 110K
描述
1K 2.5V Dual Mode I 2 C Serial EEPROM

24LC21A 数据手册

 浏览型号24LC21A的Datasheet PDF文件第2页浏览型号24LC21A的Datasheet PDF文件第3页浏览型号24LC21A的Datasheet PDF文件第4页浏览型号24LC21A的Datasheet PDF文件第5页浏览型号24LC21A的Datasheet PDF文件第6页浏览型号24LC21A的Datasheet PDF文件第7页 
24LC21A  
2
1K 2.5V Dual Mode I C Serial EEPROM  
FEATURES  
PACKAGE TYPES  
PDIP  
• Single supply with operation down to 2.5V  
• Completely implements DDC1 /DDC2  
interface for monitor identification, including recov-  
ery to DDC1  
NC  
NC  
1
2
8
7
VCC  
VCLK  
• Pin and function compatible with 24LC21  
• Low power CMOS technology  
- 1 mA typical active current  
NC  
3
4
6
5
SCL  
SDA  
VSS  
- 10 µA standby current typical at 5.5V  
2
• 2-wire serial interface bus, I C compatible  
SOIC  
• 100 kHz (2.5V) and 400 kHz (5V) compatibility  
• Self-timed write cycle (including auto-erase)  
• Page-write buffer for up to eight bytes  
10,000,000 erase/write cycles guaranteed  
1
8
NC  
VCC  
• Data retention > 200 years  
• ESD Protection > 4000V  
• 8-pin PDIP and SOIC package  
• Available for extended temperature ranges  
2
3
4
7
6
5
NC  
NC  
VCLK  
SCL  
SDA  
- Commercial (C):  
- Industrial (I):  
0°C to +70°C  
-40°C to +85°C  
VSS  
DESCRIPTION  
The Microchip Technology Inc. 24LC21A is a 128 x 8-  
bit dual-mode Electrically Erasable PROM. This device  
is designed for use in applications requiring storage  
and serial transmission of configuration and control  
information. Two modes of operation have been imple-  
mented: Transmit-Only Mode and Bi-directional Mode.  
Upon power-up, the device will be in the Transmit-Only  
Mode, sending a serial bit stream of the memory array  
from 00h to 7Fh, clocked by the VCLK pin. A valid high  
to low transition on the SCL pin will cause the device to  
enter the transition mode, and look for a valid control  
BLOCK DIAGRAM  
HV GENERATOR  
I/O  
CONTROL  
LOGIC  
MEMORY  
CONTROL  
LOGIC  
EEPROM  
ARRAY  
XDEC  
PAGE LATCHES  
2
byte on the I C bus. If it detects a valid control byte from  
SDA  
SCL  
the master, it will switch into Bi-directional Mode, with  
byte selectable read/write capability of the memory  
array using SCL. If no control byte is received, the  
device will revert to the Transmit-Only Mode after it  
receives 128 consecutive VCLK pulses while the SCL  
pin is idle. The 24LC21A is available in a standard 8-pin  
PDIP and SOIC package in both commercial and  
industrial temperature ranges.  
YDEC  
VCLK  
SENSE AMP  
R/W CONTROL  
VCC  
VSS  
DDC is a trademark of the Video Electronics Standards Association.  
I2C is a trademark of Philips Corporation.  
1996 Microchip Technology Inc.  
Preliminary  
DS21160B-page 1  
This document was created with FrameMaker 4 0 4  

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