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24LC025TST PDF预览

24LC025TST

更新时间: 2024-09-23 23:19:15
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
12页 180K
描述
I2C Serial EEPROM

24LC025TST 数据手册

 浏览型号24LC025TST的Datasheet PDF文件第2页浏览型号24LC025TST的Datasheet PDF文件第3页浏览型号24LC025TST的Datasheet PDF文件第4页浏览型号24LC025TST的Datasheet PDF文件第5页浏览型号24LC025TST的Datasheet PDF文件第6页浏览型号24LC025TST的Datasheet PDF文件第7页 
24LC024/24LC025  
2K 2.2V I2CSerial EEPROM  
PACKAGE TYPES  
FEATURES  
PDIP/SOIC  
• Single supply with operation from 2.2 to 5.5V  
• Low power CMOS technology  
- 1 mA active current typical  
A0  
1
8
Vcc  
- 10 µA standby current typical at 5.5V  
• Organized as a single block of 128 bytes (256 x 8)  
• Hardware write protection for entire array  
(24LC024)  
A1  
A2  
2
3
7
6
WP*  
SCL  
• 2-wire serial interface bus, I2C compatible  
• 100kHz and 400kHz compatibility  
• Page-write buffer for up to 16 bytes  
• Self-timed write cycle (including auto-erase)  
• 3.5 ms typical write cycle time for page write  
• Address lines allow up to eight devices on bus  
• 1,000,000 erase/write cycles guaranteed  
• ESD protection > 4,000V  
Vss  
4
5
SDA  
TSSOP  
• Data retention > 200 years  
• 8-pin PDIP, SOIC or TSSOP packages  
• Available for extended temperature ranges  
1
8
A0  
A1  
VCC  
2
7
WP*  
- Commercial (C):  
- Industrial (I):  
0°C to +70°C  
-40°C to +85°C  
3
4
6
5
A2  
VSS  
SCL  
SDA  
DESCRIPTION  
*WP pin available only on 24LC024. This  
pin has no internal connection on 24LC025  
The Microchip Technology Inc. 24LC024/24LC025 is a  
2K bit Serial Electrically Erasable PROM with a voltage  
range of 2.2V to 5.5V. The device is organized as a  
single block of 256 x 8-bit memory with a 2-wire serial  
interface. Low current design permits operation with  
typical standby and active currents of only 10 µA and 1  
mA respectively. The device has a page-write capability  
for up to 16 bytes of data. Functional address lines  
allow the connection of up to eight 24LC024/24LC025  
devices on the same bus for up to 16K bits of contigu-  
ous EEPROM memory. The device is available in the  
standard 8-pin PDIP, 8-pin SOIC (150 mil), and TSSOP  
packages.  
BLOCK DIAGRAM  
WP*  
A0 A1 A2  
HV Generator  
I/O  
Control  
Logic  
Memory  
Control  
Logic  
EEPROM  
Array  
XDEC  
SDA  
SCL  
VCC  
VSS  
Write Protect  
Circuitry  
YDEC  
SENSE AMP  
R/W CONTROL  
*WP pin available only on 24LC024. This  
pin has no internal connection on 24LC025  
1999 Microchip Technology Inc.  
DS21210D-page 1  
This Material Copyrighted by Its Respective Manufacturer  

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