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24FC128-E/MS PDF预览

24FC128-E/MS

更新时间: 2024-11-06 11:49:15
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
38页 929K
描述
128K I2C™ CMOS Serial EEPROM

24FC128-E/MS 数据手册

 浏览型号24FC128-E/MS的Datasheet PDF文件第2页浏览型号24FC128-E/MS的Datasheet PDF文件第3页浏览型号24FC128-E/MS的Datasheet PDF文件第4页浏览型号24FC128-E/MS的Datasheet PDF文件第5页浏览型号24FC128-E/MS的Datasheet PDF文件第6页浏览型号24FC128-E/MS的Datasheet PDF文件第7页 
24AA128/24LC128/24FC128  
128K I2CCMOS Serial EEPROM  
Temperature Ranges:  
Device Selection Table  
- Industrial (I):  
- Automotive (E):  
-40C to +85C  
-40C to +125C  
Part  
VCC  
Max. Clock  
Frequency  
Temp.  
Ranges  
Number  
Range  
24AA128  
1.7-5.5V  
400 kHz(1)  
I
Description:  
24LC128  
24FC128  
2.5-5.5V  
1.7-5.5V  
400 kHz  
1 MHz(2)  
I, E  
I
The Microchip Technology Inc. 24AA128/24LC128/  
24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial  
Electrically Erasable PROM (EEPROM), capable of  
operation across a broad voltage range (1.7V to 5.5V).  
It has been developed for advanced, low-power  
applications such as personal communications or data  
acquisition. This device also has a page write capabil-  
ity of up to 64 bytes of data. This device is capable of  
both random and sequential reads up to the 128K  
boundary. Functional address lines allow up to eight  
devices on the same bus, for up to 1 Mbit address  
space. This device is available in the standard 8-pin  
plastic DIP, SOIC (3.90 mm and 5.28 mm), TSSOP,  
MSOP, DFN, TDFN and Chip Scale packages.  
Note 1: 100 kHz for VCC < 2.5V.  
2: 400 kHz for VCC < 2.5V.  
Features:  
• Single Supply with Operation down to 1.7V for  
24AA128/24FC128 devices, 2.5V for 24LC128  
Devices  
• Low-Power CMOS Technology:  
- Write current 3 mA, typical  
- Standby current 100 nA, typical  
• 2-Wire Serial Interface, I2C™ Compatible  
• Cascadable up to Eight Devices  
• Schmitt Trigger Inputs for Noise Suppression  
• Output Slope Control to Eliminate Ground Bounce  
• 100 kHz and 400 kHz Clock Compatibility  
• 1 MHz Clock for FC Versions  
Block Diagram  
A0 A1 A2WP  
HV Generator  
I/O  
Control  
Logic  
Memory  
Control  
Logic  
EEPROM  
Array  
XDEC  
• Page Write Time 5 ms, typical  
• Self-Timed Erase/Write Cycle  
Page Latches  
• 64-Byte Page Write Buffer  
I/O  
• Hardware Write-Protect  
SCL  
YDEC  
• ESD Protection >4000V  
SDA  
• More than 1 Million Erase/Write Cycles  
• Data Retention > 200 years  
VCC  
VSS  
• Factory Programming Available  
Sense Amp.  
R/W Control  
• Packages include 8-lead PDIP, SOIC, TSSOP,  
DFN, TDFN, MSOP, and Chip Scale Packages  
• Pb-Free and RoHS Compliant  
*24XX128 is used in this document as a generic part number  
for the 24AA128/24LC128/24FC128 devices.  
Package Types  
PDIP/SOIC  
TSSOP/MSOP1  
CS (Chip Scale)2  
DFN/TDFN  
VCC A1 A0  
A0  
1
8
VCC  
1
2
8
7
1
2
3
4
A0  
A1  
8
7
6
5
VCC  
WP  
A0  
A1  
VCC  
WP  
1
2
3
A1  
A2  
2
3
4
7
6
5
WP  
4
5
WP  
A2  
A2  
SCL  
SDA  
8
6
7
SCL  
SDA  
3
4
6
5
A2  
SCL  
SDA  
SDA SCL VSS  
VSS  
VSS  
VSS  
(TOP DOWN VIEW,  
BALLS NOT VISIBLE)  
Note 1: Pins A0 and A1 are no-connects for the MSOP package only.  
2: Available in I-temp, “AA” only.  
2010 Microchip Technology Inc.  
DS21191S-page 1  

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