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24AA256T-E/MNY PDF预览

24AA256T-E/MNY

更新时间: 2024-11-27 13:03:59
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
26页 465K
描述
I2C/2-WIRE SERIAL EEPROM

24AA256T-E/MNY 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:HVSON, SOLCC8,.11,20Reach Compliance Code:compliant
Factory Lead Time:10 weeks风险等级:1.66
最大时钟频率 (fCLK):0.4 MHz数据保留时间-最小值:200
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010DDDR
JESD-30 代码:R-PDSO-N8JESD-609代码:e4
长度:3 mm内存密度:262144 bit
内存集成电路类型:EEPROM内存宽度:8
功能数量:1端子数量:8
字数:32768 words字数代码:32000
工作模式:SYNCHRONOUS最高工作温度:125 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装等效代码:SOLCC8,.11,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE并行/串行:SERIAL
反向引出线:NO筛选级别:AEC-Q100
座面最大高度:0.8 mm串行总线类型:I2C
最大待机电流:0.000005 A最大压摆率:0.003 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.7 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL宽度:2 mm
最长写入周期时间 (tWC):5 ms写保护:HARDWARE
Base Number Matches:1

24AA256T-E/MNY 数据手册

 浏览型号24AA256T-E/MNY的Datasheet PDF文件第2页浏览型号24AA256T-E/MNY的Datasheet PDF文件第3页浏览型号24AA256T-E/MNY的Datasheet PDF文件第4页浏览型号24AA256T-E/MNY的Datasheet PDF文件第5页浏览型号24AA256T-E/MNY的Datasheet PDF文件第6页浏览型号24AA256T-E/MNY的Datasheet PDF文件第7页 
24AA256/24LC256/24FC256  
256K I2CCMOS Serial EEPROM  
Device Selection Table  
Description:  
Part  
Number  
VCC  
Range  
Max. Clock  
Frequency  
Temp.  
Ranges  
The Microchip Technology Inc. 24AA256/24LC256/  
24FC256 (24XX256*) is a 32K x 8 (256 Kbit) Serial  
Electrically Erasable PROM, capable of operation  
across a broad voltage range (1.8V to 5.5V). It has  
been developed for advanced, low-power applications  
such as personal communications or data acquisition.  
This device also has a page write capability of up to 64  
bytes of data. This device is capable of both random  
and sequential reads up to the 256K boundary.  
Functional address lines allow up to eight devices on  
the same bus, for up to 2 Mbit address space. This  
device is available in the standard 8-pin plastic DIP,  
SOIC, TSSOP, MSOP and DFN packages.  
24AA256  
24LC256  
24FC256  
1.8-5.5V  
2.5-5.5V  
1.8-5.5V  
400 kHz(1)  
400 kHz  
1 MHz(2)  
I
I, E  
I
Note 1: 100 kHz for VCC < 2.5V.  
2: 400 kHz for VCC < 2.5V.  
Features:  
• Low-power CMOS technology:  
- Maximum write current 3 mA at 5.5V  
- Maximum read current 400 μA at 5.5V  
- Standby current 100 nA, typical at 5.5V  
Block Diagram  
• 2-wire serial interface bus, I2Ccompatible  
• Cascadable for up to eight devices  
• Self-timed erase/write cycle  
A0 A1A2WP  
HV Generator  
I/O  
Control  
Logic  
• 64-byte Page Write mode available  
• 5 ms max. write cycle time  
Memory  
Control  
Logic  
EEPROM  
Array  
XDEC  
• Hardware write-protect for entire array  
• Output slope control to eliminate ground bounce  
• Schmitt Trigger inputs for noise suppression  
• 1,000,000 erase/write cycles  
Page Latches  
I/O  
SCL  
YDEC  
SDA  
• Electrostatic discharge protection > 4000V  
• Data retention > 200 years  
VCC  
VSS  
• 8-pin PDIP, SOIC, TSSOP, MSOP and DFN  
packages, 14-lead TSSOP package  
Sense Amp.  
R/W Control  
• Pb-free finishes available  
Temperature ranges:  
- Industrial (I):  
- Automotive (E):  
-40°C to +85°C  
-40°C to +125°C  
Package Types  
PDIP/SOIC  
TSSOP/MSOP*  
DFN  
A0  
1
8
VCC  
1
2
3
4
A0  
A1  
8
7
6
5
VCC  
WP  
1
2
8
7
A0  
A1  
VCC  
A1  
A2  
2
3
7
6
WP  
WP  
A2  
SCL  
SDA  
SCL  
3
4
6
5
A2  
SCL  
SDA  
VSS  
VSS  
4
5
SDA  
VSS  
Note: * Pins A0 and A1 are no connects for the MSOP package only.  
*24XX256 is used in this document as a generic part number for the 24AA256/24LC256/24FC256 devices.  
© 2005 Microchip Technology Inc.  
DS21203N-page 1  

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