1894K-32LF

更新时间： 2024-11-05 06:21:39

品牌	Logo	应用领域
艾迪悌 - IDT		网络接口电信集成电路电信电路 PC
页数	文件大小	规格书
50页	306K
描述
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

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技术参数
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1894K-32LF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	VFQFPN
包装说明：	HVQCCN, LCC32,.2SQ,20	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	1.38
Samacsys Confidence：	3	Samacsys Status：	Released
Samacsys PartID：	11129678	Samacsys Pin Count：	33
Samacsys Part Category：	Integrated Circuit	Samacsys Package Category：	Quad Flat No-Lead
Samacsys Footprint Name：	32-lead VFQFN, Lead Free	Samacsys Released Date：	2020-01-28 09:52:17
Is Samacsys：	N	数据速率：	100000 Mbps
JESD-30 代码：	S-XQCC-N32	JESD-609代码：	e3
长度：	5 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	32
收发器数量：	1	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装等效代码：	LCC32,.2SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Network Interfaces	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	INTERFACE CIRCUIT	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	5 mm
Base Number Matches：	1

1894K-32LF 数据手册

DATASHEET

10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-32

Description

Features

The ICS1894-32 is a low-power, physical-layer device

(PHY) that supports the ISO/IEC 10Base-T and

100Base-TX Carrier-Sense Multiple Access/Collision

Detection (CSMA/CD) Ethernet standards, ISO/IEC

8802.3. It is intended for RMII/MII Node applications and

includes the Auto-MDIX feature that automatically corrects

crossover errors in plant wiring.

• Supports category 5 cables and above with attenuation in

excess of 24dB at 100 MHz.

• Single-chip, fully integrated PHY provides PCS, PMA,

PMD, and AUTONEG sub layers functions of IEEE

standard.

• 10Base-T and 100Base-TX ISO/IEC 8802.3 compliant

• MIIM (MDC/MDIO) management bus for PHY register

The ICS1894-32 incorporates Digital-Signal Processing

(DSP) control in its Physical-Medium Dependent (PMD)

sub-layer. As a result, it can transmit and receive data on

unshielded twisted-pair (UTP) category 5 cables with

attenuation in excess of 24 dB at 100MHz.

configuration

• RMII interface support with external 50 MHz system clock

• Single 3.3V power supply

• Highly configurable, supports:

The ICS1894-32 provides a Serial-Management Interface

for exchanging command and status information with a

Station-Management (STA) entity. The ICS1894-32

Media-Dependent Interface (MDI) can be configured to

provide full-duplex operation at data rates of 10 Mb/s or

100Mb/s.

– Media Independent Interface (MII)

– Auto-Negotiation with Parallel detection

– Node applications, managed or unmanaged

– 10M or 100M full duplex modes

– Loopback mode for Diagnostic Functions

• Auto-MDI/MDIX crossover correction

• Low-power CMOS (typically 300 mW)

• Power-Down mode (typically 21mW)

• Clock and crystal supported in MII mode

• Programmable LEDs

In addition, the ICS1894-32 includes a programmable LED

and interrupt output function. The LED outputs can be

configured through registers to indicate the occurance of

certain events such as LINK, COLLISION, ACTIVITY, etc.

The purpose of the programmable interrupt output is to

notify the PHY controller device immediately when a certain

event happens instead of having the PHY controller

continuously poll the PHY. The events that could be used to

generate interrupts are: receiver error, Jabber, page

received, parallel detect fault, link partner acknowledge, link

status change, auto-negotiation complete, remote fault,

collision, etc.

• Interrupt output pin

• Fully integrated, DSP-based PMD includes:

– Adaptive equalization and baseline-wander

correction

The ICS1894-32 has deep power modes that can result in

significant power savings when the link is broken.

– Transmit wave shaping and stream cipher

scrambler

– MLT-3 encoder and NRZ/NRZI encoder

• Core power supply (3.3 V)

Applications: NIC cards, PC motherboards, switches,

routers, DSL and cable modems, game machines, printers,

network connected appliances, and industrial equipment.

• 3.3 V/1.8 V VDDIO operation supported

• Smart power control with deep power down feature

• Available in 32-pin (5mm x 5mm) QFN package, Pb-free

• Available in Industrial Temp and Lead Free

IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-32

REV K 060110

12 3 4 5 6 7...50

中文翻译

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1894K-32LF 替代型号

型号	品牌	替代类型	描述	数据表
1894KI-32LFT	IDT	功能相似	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894KI-32LF	IDT	功能相似	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894K-32LFT	IDT	功能相似	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

与1894K-32LF相关器件

型号	品牌	获取价格	描述	数据表
1894K-32LFT	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894K-40LF	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894K-40LFT	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894KI-32LF	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894KI-32LFT	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894KI-40LF	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894KI-40LFT	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1895007	PHOENIX	获取价格	Modular Terminal Block, 4A, 1 Row(s), 1 Deck(s), ROHS COMPLIANT
1895010	PHOENIX	获取价格	Modular Terminal Block, 4A, 1 Row(s), 1 Deck(s), ROHS COMPLIANT
1895298	PHOENIX	获取价格	Barrier Strip Terminal Block,

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