Datasheet > 1894-40

1894-40

更新时间： 2024-11-21 14:56:47

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
54页	570K
描述
10Base-T/100Base-TX Integrated PHYceiver? with RMII Interface

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1894-40 数据手册

DATASHEET

10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-40

Description

Features

The ICS1894-40 is a low-power, physical-layer device

(PHY) that supports the ISO/IEC 10Base-T and

100Base-TX Carrier-Sense Multiple Access/Collision

Detection (CSMA/CD) Ethernet standards, ISO/IEC

8802.3. It is intended for RMII/MII, Node/Repeater

applications and includes the Auto-MDIX feature that

automatically corrects crossover errors in plant wiring.

• Supports category 5 cables and above with attenuation in

excess of 24dB at 100 MHz.

• Single-chip, fully integrated PHY provides PCS, PMA,

PMD, and AUTONEG sub layers functions of IEEE

standard.

• 10Base-T and 100Base-TX IEEE 8802.3 compliant

• MIIM (MDC/MDIO) management bus for PHY register

The ICS1894-40 incorporates Digital-Signal Processing

(DSP) control in its Physical-Medium Dependent (PMD)

sub-layer. As a result, it can transmit and receive data on

unshielded twisted-pair (UTP) category 5 cables with

attenuation in excess of 24 dB at 100MHz.

configuration

• RMII interface support with external 50 MHz system clock

• Single 3.3V power supply

• Highly configurable, supports:

The ICS1894-40 provides a Serial-Management Interface

for exchanging command and status information with a

Station-Management (STA) entity. The ICS1894-40

Media-Dependent Interface (MDI) can be configured to

provide either half-duplex or full-duplex operation at data

rates of 10 Mb/s or 100Mb/s.

– Media Independent Interface (MII)

– Auto-Negotiation with Parallel detection

– Node applications, managed or unmanaged

– 10M or 100M full and half-duplex modes

– Loopback mode for Diagnostic Functions

• Auto-MDI/MDIX crossover correction

• Low-power CMOS (typically 300 mW)

• Power-Down mode (typically 21mW)

• Clock and crystal supported in MII mode

• Programmable LEDs

In addition, the ICS1894-40 includes a programmable LED

and interrupt output function. The LED outputs can be

configured through registers to indicate the occurance of

certain events such as LINK, COLLISION, ACTIVITY, etc.

The purpose of the programmable interrupt output is to

notify the PHY controller device immediately when a certain

event happens instead of having the PHY controller

continuously poll the PHY. The events that could be used to

generate interrupts are: receiver error, Jabber, page

received, parallel detect fault, link partner acknowledge, link

status change, auto-negotiation complete, remote fault,

collision, etc.

• Interrupt output pin

• Fully integrated, DSP-based PMD includes:

– Adaptive equalization and baseline-wander

correction

The ICS1894-40 has deep power modes that can result in

significant power savings when the link is broken.

– Transmit wave shaping and stream cipher

scrambler

– MLT-3 encoder and NRZ/NRZI encoder

• Core power supply (3.3 V)

Applications: NIC cards, PC motherboards, switches,

routers, DSL and cable modems, game machines, printers,

network connected appliances, and industrial equipment.

• 3.3 V/1.8 V VDDIO operation supported

• Smart power control with deep power down feature

• Available in 40-pin (6mm x 6mm) QFN package, Pb-free

• Industrial Temp and Lead Free

Not recommended for new designs

— For full/half duplex RMII only interface support, please refer to ICS1894-43 datasheet.

— For full/half duplex MII only interface support, please refer to ICS1894-44 datasheet.

— ICS1894-43 and ICS1894-44 are pin-compatible with ICS1894-40.

IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE

ICS1894-40

REV K 022412

12 3 4 5 6 7...54

中文翻译

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与1894-40相关器件

型号	品牌	获取价格	描述	数据表
1894-40KLF	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
1894-40KLFT	IDT	获取价格	10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
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