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1893AGLFT PDF预览

1893AGLFT

更新时间: 2024-11-11 13:03:27
品牌 Logo 应用领域
艾迪悌 - IDT 网络接口电信集成电路电信电路光电二极管
页数 文件大小 规格书
136页 1040K
描述
Interface Circuit, 1-Trnsvr, CMOS, PDSO56, 0.240 INCH, 0.50 MM PITCH, LEAD FREE, TSSOP-56

1893AGLFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.32
数据速率:100000 MbpsJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:14 mm
湿度敏感等级:1功能数量:1
端子数量:56收发器数量:1
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Network Interfaces
最大压摆率:0.16 mA标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:INTERFACE CIRCUIT温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:6.1 mm
Base Number Matches:1

1893AGLFT 数据手册

 浏览型号1893AGLFT的Datasheet PDF文件第2页浏览型号1893AGLFT的Datasheet PDF文件第3页浏览型号1893AGLFT的Datasheet PDF文件第4页浏览型号1893AGLFT的Datasheet PDF文件第5页浏览型号1893AGLFT的Datasheet PDF文件第6页浏览型号1893AGLFT的Datasheet PDF文件第7页 
Integrated Circuit Systems, Inc.  
Document Type: Data Sheet  
Document Stage: Release  
ICS1893AF  
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™  
General  
Features  
The ICS1893AF is a lower cost, re-packaged version of the  
ICS1893Y-10. The ICS1893AF is a fully integrated, Physical  
Layer device (PHY) that is compliant with both the 10Base-T  
and 100Base-TX CSMA/CD Ethernet Standard, ISO/IEC  
8802-3. The ICS1893AF uses the same proven silicon as  
the ICS1893Y-10 but offers a lower cost solution by using a  
lower cost 300 mil. 48-lead SSOP package.  
Single 3.3V power supply  
Supports category 5 cables with attenuation in excess of  
24dB at 100 MHz.  
DSP-based baseline wander correction to virtually  
eliminate killer packets  
Low-power, 0.35-micron CMOS (typically 400 mW)  
Single-chip, fully integrated PHY provides PCS, PMA,  
PMD, and AUTONEG sublayers of IEEE standard  
10Base-T and 100Base-TX IEEE 802.3 compliant  
The ICS1893AF uses the same twisted-pair transmit and  
receive circuits as the ICS1893Y-10, and the same  
recommended board layout techniques apply to the  
ICS1893AF.  
Clock or crystal supported  
Media Independent Interface (MII) supported  
Managed or Unmanaged Applications  
10M or 100M Half and Full Duplex Modes  
The ICS1893AF is intended for Node applications using the  
standard MII interface to the MAC.  
Auto-Negotiation with Parallel detection for Legacy  
products  
Fully integrated, DSP-based PMD includes:  
– Adaptive equalization and baseline wander correction  
– Transmit wave shaping and stream cipher scrambler  
– MLT-3 encoder and NRZ/NRZI encoder  
All differences in the ICS1893AF / ICS1893Y-10 Feature Set  
are listed in the Comparison Table on page 14.  
Loopback mode for Diagnostic Functions  
Small footprint 48-pin 300 mil SSOP package. Available in  
Industrial Temperature
ICS1893AF Block Diagram  
100Base-T  
PCS  
Framer  
CRS/COL  
Detection  
10/100 MII  
MAC  
Interface  
Twisted-  
Pair  
Interface to  
Magnetics  
Modules and  
RJ45  
Interface  
MUX  
Integrated  
Switch  
Parallel to Serial  
4B/5B  
10Base-T  
Connector  
MII  
Low-Jitter  
Clock  
Synthesizer  
Auto-  
Negotiation  
Configuration  
and Status  
Extended  
Register  
Set  
MII Serial  
Management  
Interface  
Clock  
Power  
LEDs and PHY  
Address  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any information  
being relied upon by the customer is current and accurate.  
ICS1893AF, Rev. F 05/13/10  

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