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11575-801 PDF预览

11575-801

更新时间: 2024-01-25 20:13:29
品牌 Logo 应用领域
其他 - ETC 晶体时钟发生器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
25页 1413K
描述
EEPROM Programmable 3-PLL Clock Generator IC

11575-801 技术参数

生命周期:Transferred包装说明:0.150 INCH, SOIC-16
Reach Compliance Code:unknown风险等级:5.77
其他特性:OPERATES AT 3.3V MINIMUM SUPPLYJESD-30 代码:R-PDSO-G16
长度:9.89 mm端子数量:16
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:150 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE主时钟/晶体标称频率:27 MHz
认证状态:Not Qualified座面最大高度:1.73 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

11575-801 数据手册

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FS6370-01  
EEPROM Programmable 3-PLL Clock Generator IC  
1.0 Features  
2.0 Description  
The FS6370 is a CMOS clock generator IC designed to  
minimize cost and component count in a variety of elec-  
tronic systems. Three EEPROM-programmable phase-  
locked loops (PLLs) driving four programmable muxes  
and post dividers provide a high degree of flexibility.  
Just-in-time customization of clock frequencies via  
internal non-volatile 128-bit serial EEPROM  
2
ä
I C -bus serial interface  
Three on-chip PLLs with programmable Reference  
and Feedback Dividers  
An internal EEPROM permits just-in-time factory pro-  
Four independently programmable muxes and post  
dividers  
gramming of devices for end user requirements.  
Programmable power-down of all PLLs and output  
Figure 1: Pin Configuration  
clock drivers  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VSS  
SEL_CD  
PD/SCL  
VSS  
VDD  
Tristate outputs for board testing  
CLK_A  
VDD  
One PLL and two mux/post-divider combinations  
can be modified via SEL_CD input  
5V to 3.3V operation  
Accepts 5MHz to 27MHz crystal resonators  
ROM-based device available for cost reduction mi-  
gration path – contact your AMI sales representative  
for more information  
CLK_B  
CLK_C  
VSS  
XIN  
XOUT  
OE/SDA  
VDD  
CLK_D  
MODE  
16-pin (0.150”) SOIC  
Figure 2: Block Diagram  
XIN  
Reference  
Oscillator  
Mux A  
Post  
XOUT  
CLK_A  
CLK_B  
CLK_C  
Divider A  
PLL A  
Power Down  
Control  
MODE  
Mux B  
Mux C  
Post  
Divider B  
PLL B  
PLL C  
PD/SCL  
I2C-bus  
Interface  
OE/SDA  
Post  
Divider C  
EEPROM  
Mux D  
Post  
CLK_D  
SEL_CD  
Divider D  
FS6370  
I2C is a licensed trademark of Philips Electronics, N.V. American Microsystems, Inc., reserves the right to change the detail specifications as may be required to permit improvements in the design of  
its products.  

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