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100344

更新时间: 2024-09-14 22:37:19
品牌 Logo 应用领域
美国国家半导体 - NSC 锁存器驱动
页数 文件大小 规格书
8页 174K
描述
Low Power 8-Bit Latch with Cut-Off Drivers

100344 数据手册

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August 1998  
100344  
Low Power 8-Bit Latch with Cut-Off Drivers  
The 100344 outputs are designed to drive a doubly termi-  
nated 50transmission line (25load impedance). All in-  
puts have 50 kpull-down resistors.  
General Description  
The 100344 contains eight D-type latches, individual inputs  
(Dn), outputs (Qn), a common enable pin (E), latch enable  
(LE), and output enable pin (OEN). A Q output follows its D  
input when both E and LE are LOW. When either E or LE (or  
both) are HIGH, a latch stores the last valid data present on  
its D input prior to E or LE going HIGH.  
Features  
n Cut-off drivers  
n Drives 25load  
n Low power operation  
n 2000V ESD protection  
A HIGH on OEN holds the outputs in a cut-off state. The  
cut-off state is designed to be more negative than a normal  
ECL LOW level. This allows the output emitter-followers to  
turn off when the termination supply is −2.0V, presenting a  
high impedance to the data bus. This high impedance re-  
duces termination power and prevents loss of low state  
noise margin when several loads share the bus.  
=
n Voltage compensated operating range −4.2V to −5.7V  
n Available to MIL-STD-883  
Logic Symbol  
Pin Names  
D0–D7  
E
Description  
Data Inputs  
Enable Input  
LE  
Latch Enable Input  
Output Enable Input  
Data Outputs  
OEN  
Q0–Q7  
DS100317-4  
Connection Diagrams  
24-Pin DIP  
24-Pin Quad Cerpak  
DS100317-2  
DS100317-1  
© 1998 National Semiconductor Corporation  
DS100317  
www.national.com  

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